Optimistic distributed timed cosimulation based on thread simulation model
Proceedings of the 6th international workshop on Hardware/software codesign
Virtual synchronization for fast distributed cosimulation of dataflow task graphs
Proceedings of the 15th international symposium on System Synthesis
Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Trace-driven HW/SW cosimulation using virtual synchronization technique
Proceedings of the 42nd annual Design Automation Conference
A cosimulation methodology for HW/SW validation and performance estimation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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An optimized hardware software cosimulation method based on the backplane approach is presented in this paper. To enhance the performance of cosimulation, efforts are focused on reducing control packets between simulators as well as concurrent execution of simulators. Optimized timed cosimulation is achieved without roll-back mechanism to build a general cosimulation backplane environment.