Design considerations for databus charge recovery

Authors:
Benjamin Bishop;Victor Lyuboslavsky;N. Vijaykrishnan;Mary Jane Irwin
Affiliations:
Univ. of Georgia, Athens, GA;National instrument;Pennsylvania State Univ., University Park, PA;Pennsylvania State Univ., University Park, PA
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Year:
2001

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Abstract

The charge recovery databus is a scheme which reduces energy consumption through the application of adiabatic circuit techniques. Previous work gives a solid theoretical analysis of this scheme, including quantitative data assuming random bus values. We extend this earlier work by presenting a quantitative analysis of the charge recovery databus using 15 benchmarks and four high level bus coding schemes. We show that a very simple implementation of the charge recovery databus is capable of reducing average energy consumption by 28% beyond traditional high-level bus encoding techniques. In addition, we examine delay and energy consumption in the added hardware.