A novel method for stochastic nonlinearity analysis of a CMOS pipeline ADC

  • Authors:
  • David Goren;Eliyahu Shamsaevc;A. Wagner

  • Affiliations:
  • IBM Haifa Research Lab, MATAM, Haifa 31905, Israel;IBM Haifa Research Lab, MATAM, Haifa 31905, Israel;IBM Haifa Research Lab, MATAM, Haifa 31905, Israel

  • Venue:
  • Proceedings of the 38th annual Design Automation Conference
  • Year:
  • 2001

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Abstract

An analytic appraoch is presented for estimating the nonlinearity of an analog to digital converter (ADC) as a function of the variations in the circuit devices. The approach is demonstrated for the case of a pipeline ADC with digital error correction. Under some mild assumptions on the expected variations, the error probability is expressed as a simple explicit function of the standard deviations in the components' parameters: gain errors, comparator offset errors and resistor errors. The analytical expression is verified for Integral Non Linearity (INL), and its limits are studied using Monte-Carlo simulations of a 10 bit pipeline ADC structure.