On tiling space-time mapped loop nests

  • Authors:
  • Martin Griebl

  • Affiliations:
  • University of Passau, FMI

  • Venue:
  • Proceedings of the thirteenth annual ACM symposium on Parallel algorithms and architectures
  • Year:
  • 2001

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Abstract

Automatic parallelization of loop programs based on space-time mapping typically aims at maximal parallelism. In order to obtain reasonable performance, the granularity of the parallelism must be coarsened, e.g., by applying tiling techniques.In contrast to others, we suggest to apply tiling after the computation of a space-time mapping. This extends the applicability of existing tiling methods and significantly improves efficiency of parallelized loop programs.