Complexity and uniformity of elimination in Presburger arithmetic
ISSAC '97 Proceedings of the 1997 international symposium on Symbolic and algebraic computation
The Static Parallelization of Loops and Recursions
The Journal of Supercomputing - Special issue: high performance computing systems
Exact memory size estimation for array computations without loop unrolling
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
IEEE Transactions on Software Engineering - Special issue on architecture-independent languages and software tools for parallel processing
A preprocessing step for global loop transformations for data transfer optimization
CASES '00 Proceedings of the 2000 international conference on Compilers, architecture, and synthesis for embedded systems
Low-power systems on chips (SOCs)
Proceedings of the conference on Design, automation and test in Europe
On tiling space-time mapped loop nests
Proceedings of the thirteenth annual ACM symposium on Parallel algorithms and architectures
Configuring of Algorithms in Mapping into Hardware
The Journal of Supercomputing
Energy estimation of nested loop programs
Proceedings of the fourteenth annual ACM symposium on Parallel algorithms and architectures
Communication Optimization for Affine Recurrence Equations Using Broadcast and Locality
International Journal of Parallel Programming
International Journal of Parallel Programming
Generation of Injective and Reversible Modular Mappings
IEEE Transactions on Parallel and Distributed Systems
High Level Software Synthesis of Affine Iterative Algorithms onto Parallel Architectures
HPCN Europe 2000 Proceedings of the 8th International Conference on High-Performance Computing and Networking
A Geometric Semantics for Program Representation in the Polytope Model
LCPC '99 Proceedings of the 12th International Workshop on Languages and Compilers for Parallel Computing
Application of the Polytope Model to Functional Programs
LCPC '99 Proceedings of the 12th International Workshop on Languages and Compilers for Parallel Computing
Issues of the Automatic Generation of HPF Loop Programs
LCPC '00 Proceedings of the 13th International Workshop on Languages and Compilers for Parallel Computing-Revised Papers
Design Space Exploration for Massively Parallel Processor Arrays
PaCT '01 Proceedings of the 6th International Conference on Parallel Computing Technologies
Generation of Distributed Loop Control
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Euro-Par '01 Proceedings of the 7th International Euro-Par Conference Manchester on Parallel Processing
Generation of distributed loop control
Embedded processor design challenges
On the parallelization of loop nests containing while loops
PAS '95 Proceedings of the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis
Parallelization of divide-and-conquer by translation to nested loops
Journal of Functional Programming
Efficient and Accurate Analytical Modeling of Whole-Program Data Cache Behavior
IEEE Transactions on Computers
Costing stepwise refinements of parallel programs
Computer Languages, Systems and Structures
Efficient control generation for mapping nested loop programs onto processor arrays
Journal of Systems Architecture: the EUROMICRO Journal
MPSoC memory optimization using program transformation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Query responsive awareness software: inventory control case study
Proceedings of the 2nd international conference on Ubiquitous information management and communication
Explicit Dependence Metadata in an Active Visual Effects Library
Languages and Compilers for Parallel Computing
A holistic approach for tightly coupled reconfigurable parallel processors
Microprocessors & Microsystems
Parallelization Approaches for Hardware Accelerators --- Loop Unrolling Versus Loop Partitioning
ARCS '09 Proceedings of the 22nd International Conference on Architecture of Computing Systems
Precise Management of Scratchpad Memories for Localising Array Accesses in Scientific Codes
CC '09 Proceedings of the 18th International Conference on Compiler Construction: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009
Optimal interprocedural program optimization: a new framework and its application
Optimal interprocedural program optimization: a new framework and its application
PolyAPM: parallel programming via stepwise refinement with abstract parallel machines
IFL'02 Proceedings of the 14th international conference on Implementation of functional languages
Symbolic and analytic techniques for resource analysis of java bytecode
TGC'10 Proceedings of the 5th international conference on Trustworthly global computing
Automatic code generation for distributed memory architectures in the polytope model
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Application specific memory access, reuse and reordering for SDRAM
ARC'11 Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications
A data parallel view on polyhedral process networks
Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems
ACM SIGARCH Computer Architecture News
Controller synthesis for mapping partitioned programs on array architectures
ARCS'06 Proceedings of the 19th international conference on Architecture of Computing Systems
Forward communication only placements and their use for parallel program construction
LCPC'02 Proceedings of the 15th international conference on Languages and Compilers for Parallel Computing
Polyhedral code generation in the real world
CC'06 Proceedings of the 15th international conference on Compiler Construction
Synthesising graphics card programs from DSLs
Proceedings of the 33rd ACM SIGPLAN conference on Programming Language Design and Implementation
Automatic extraction of multi-objective aware pipeline parallelism using genetic algorithms
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Analytical synthesis of bandwidth-efficient SDRAM address generators
Microprocessors & Microsystems
Automatic extraction of pipeline parallelism for embedded heterogeneous multi-core platforms
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
Hi-index | 0.00 |