High Level Software Synthesis of Affine Iterative Algorithms onto Parallel Architectures

Authors:
Alessandro Marongiu;Paolo Palazzari;Luigi Cinque;Ferdinando Mastronardo
Affiliations:
-;-;-;-
Venue:
HPCN Europe 2000 Proceedings of the 8th International Conference on High-Performance Computing and Networking
Year:
2000

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Abstract

In this work a High Level Software Synthesis (HLSS) methodology is presented. HLSS allows the automatic generation of a parallel program starting from a sequential C program. HLSS deals with a significant class of iterative algorithms, the one expressible through nested loops with affine dependencies, and integrates several techniques to achieve the final parallel program. The computational model of the System of Affine Recurrence Equations (SARE) is used. As first step in HLSS, the iterative C program is converted into SARE form; parallelism is extracted from the SARE through allocation and scheduling functions which are represented as unimodular matrices and are determined by means of an optimization process. A clustering phase is applied to fit the parallel program onto a parallel machine with a fixed amount of resources (number of processors, main memory, communication channels). Finally, the parallel program to be executed on the target parallel system is generated.