Fast and accurate quasi-three-dimensional capacitance determination of multilayer VLSI interconnects

  • Authors:
  • Woojin Jin;Yungseon Eo;William R. Eisentadt;Jongin Shim

  • Affiliations:
  • Hanyang Univ., Kyungki-Do, South Korea;Hanyang Univ., Kyungki-Do, South Korea;Univ. of Florida, Gainesville;Hanyang Univ., Kyungki-Do, South Korea

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2001

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Abstract

A new fast and accurate capacitance determination methodology for intricate multilayer VLSI interconnects is presented. Since a multilayer interconnect structure is too complicated to be directly tractable, it is simplified by investigating charge distributions within the system. The quasi-three-dimensional (3-D) capacitances of the structure are then determined by combining a set of solid-ground-based two-dimensional (2-D) capacitances and shielding effects that can be independently calculated from the simplified structure. The shielding effects due to the neighboring lines of a line can be analytically determined from the given layout dimensions. The solid-ground-based 2-D capacitances can also be quickly computed from the simplified structure. Thus, the proposed capacitance determination methodology is much more cost-efficient than conventional 3-D-based methods. It is shown that the calculated quasi-3-D capacitances have excellent agreement with 3-D field-solver-based results within 5% error.