Cycle-accurate simulation of energy consumption in embedded systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Principles of Program Analysis
Principles of Program Analysis
Cache Behavior Prediction by Abstract Interpretation
SAS '96 Proceedings of the Third International Symposium on Static Analysis
Energy consumption analysis for two embedded Java virtual machines
Journal of Systems Architecture: the EUROMICRO Journal
An energy consumption model for an embedded java virtual machine
ARCS'06 Proceedings of the 19th international conference on Architecture of Computing Systems
Hi-index | 0.01 |
In this paper, we consider processors which provide an idle instruction to the user for powering down processor units which are not required during portions of program execution. We describe algorithms which can be implemented in an energy-aware compiler to make efficient use of such an instruction. These algorithms are based on program static analysis and a combinatorial optimization formulation of the problem. We assume as input an assembly language program of the processor in question. The problem is to insert the idle instruction at different places in the assembly language program such that energy saving is maximized and the execution time of the resulting program is not increased beyond a user-specified value.