Instruction Set Extensions for MPEG-4 Video
Journal of VLSI Signal Processing Systems - Special issue on implementation of MPEG-4 multimedia codecs
Image and Video Compression for Multimedia Engineering
Image and Video Compression for Multimedia Engineering
Shape adaptive padding for MPEG-4
IEEE Transactions on Consumer Electronics
Object-based texture coding of moving video in MPEG-4
IEEE Transactions on Circuits and Systems for Video Technology
Boundary block-merging (BBM) technique for efficient texture coding of arbitrarily shaped object
IEEE Transactions on Circuits and Systems for Video Technology
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This paper proposes a reconfigurable processing unit, which performs the MPEG-4 repetitive padding algorithm in real time. The padding unit has been implemented as a scalable systolic structure of processing elements. A generic array of PE has been described in VHDL, and the functionality of the unit has been validated by simulations. In order to determine the chip area and speed of the padding structure, we have synthesized the structure for two FPGA families - Xilinx and Altera. The simulation results indicate that the proposed padding unit can operate in a wide frequency range, depending on the implemented configuration. It is shown that it can process from tens up to hundreds of thousands MPEG-4 macroblocks per second. This allows the real-time requirements of all MPEG-4 profiles and levels to be met efficiently at trivial hardware costs. Finally, the trade-off between chip-area and operating speed is discussed and possible configuration alternatives are proposed.