The ISPD98 circuit benchmark suite
ISPD '98 Proceedings of the 1998 international symposium on Physical design
On partitioning vs. placement rent properties
Proceedings of the 2001 international workshop on System-level interconnect prediction
A differential equation for placement analysis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Generating synthetic benchmark circuits for evaluating CAD tools
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Placement rent exponent calculation methods, temporal behaviour and FPGA architecture evaluation
Proceedings of the 2003 international workshop on System-level interconnect prediction
Fast estimation of the partitioning rent characteristic using a recursive partitioning model
Proceedings of the 2003 international workshop on System-level interconnect prediction
Toward the accurate prediction of placement wire length distributions in VLSI circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Empirical models for net-length probability distribution and applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Though it has become one of the most popular techniques for a priori wirelength estimation, Donath's method is heavily constrained by the underlying circuit and architecture models. In this paper, we propose analytical and numerical extensions to this model to overcome some of these constraints. It turns out that, with our extensions, Donath's model correlates very well with experimental data. This makes it particularly well suited for, among others, the parametric exploration of placement options.