Regularization of hierarchical VHDL-AMS models using bipartite graphs

  • Authors:
  • Jochen Mades;Manfred Glesner

  • Affiliations:
  • Infineon Technologies AG, Munich, Germany;Institute of Microelectronic Systems, Darmstadt University of Technology, Germany

  • Venue:
  • Proceedings of the 39th annual Design Automation Conference
  • Year:
  • 2002

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Abstract