VHDL for Logic Synthesis

Authors:
Andrew Rushton
Affiliations:
-
Venue:
VHDL for Logic Synthesis
Year:
1998

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Abstract

From the Publisher:VHDL (Very high-speed circuit Hardware Description Language) is firmly established in an industrial context, and is the worldwide standard for computer-aided electronic system design. This title focuses on logic synthesis, or the design-to-implementation phase of the VHDL cycle in generating the hardware. VHDL for Logic Synthesis was originally written as an introductory and reference text on VHDL for engineers intending to use logic synthesis, but the updated and revised second edition is intended for a broader readership by providing comprehensive coverage of the VHDL language and its use in the process of generating hardware.