Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Introduction to programmable active memories
Systolic array processors
Multigrid methods on parallel computers—a survey of recent developments
IMPACT of Computing in Science and Engineering
A survey of hardware implementations of RSA (abstract)
CRYPTO '89 Proceedings on Advances in cryptology
Hardware speedups in long integer multiplication
ACM SIGARCH Computer Architecture News - Symposium on parallel algorithms and architectures
SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
Programmable active memories: a performance assessment
Proceedings of the 1993 symposium on Research on integrated systems
A field-programmable gate array for systolic computing
Proceedings of the 1993 symposium on Research on integrated systems
Proceedings of the international conference on Programming languages and system architectures
High-energy physics on DECPeRLe-1 programmable active memory
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
A method for obtaining digital signatures and public-key cryptosystems
Communications of the ACM
Chameleon: A Workstation of a Different Colour
Selected papers from the Second International Workshop on Field-Programmable Logic and Applications, Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping
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Programmable active memories (PAM) are a novel form of universal reconfigurable hardware coprocessor. Based on field-programmable gate array (FPGA) technology, a PAM is a virtual machine, controlled by a standard microprocessor, which can be dynamically and indefinitely reconfigured into a large number of application-specific circuits. PAM's offer a new mixture of hardware performance and software versatility. We review the important architectural features of PAM's, through the example of DECPeRLe-1, an experimental device built in 1992. PAM programming is presented, in contrast to classical gate-array and full custom circuit design. Our emphasis is on large, code-generated synchronous systems descriptions; no compromise is made with regard to the performance of the target circuits. We exhibit a dozen applications where PAM technology proves superior, both in performance and cost, to every other existing technology, including supercomputers, massively parallel machines, and conventional custom hardware. The fields covered include computer arithmetic, cryptography, error correction, image analysis, stereo vision, video compression, sound synthesis, neural networks, high-energy physics, thermodynamics, biology and astronomy. At comparable cost, the computing power virtually available in a PAM exceeds that of conventional processors by a factor 10 to 1000, depending on the specific application, in 1992. A technology shrink increases the performance gap between conventional processors and PAM's. By Noyce's law, we predict by how much the performance gap will widen with time.