Hardware speedups in long integer multiplication
SPAA '90 Proceedings of the second annual ACM symposium on Parallel algorithms and architectures
Building and Using a Highly Parallel Programmable Logic Array
Computer - Special issue on experimental research in computer architecture
Definition and solution of the memory packing problem for field-programmable systems
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Plasma: an FPGA for million gate systems
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
A reconfigurable hardware approach to network simulation
ACM Transactions on Modeling and Computer Simulation (TOMACS)
The Transmogrifier-2: a 1 million gate rapid prototyping system
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
A hybrid complete-graph partial-crossbar routing architecture for multi-FPGA systems
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Fast integrated tools for circuit design with FPGAs
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
A coarse-grained FPGA architecture for high-performance FIR filtering
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Multi-terminal net routing for partial crossbar-based multi-FPGA systems
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
Programmable active memories: reconfigurable systems come of age
Readings in hardware/software co-design
Logic emulation with virtual wires
Readings in hardware/software co-design
High-performance hardware design and implementation of genetic algorithms
Hardware implementation of intelligent systems
A High-Performance, Pipelined, FPGA-Based Genetic Algorithm Machine
Genetic Programming and Evolvable Machines
Reconfigurable Computing for Digital Signal Processing: A Survey
Journal of VLSI Signal Processing Systems
Area Time Trade-Offs in Micro-Grain VLSI Array Architectures
IEEE Transactions on Computers
A Reconfigurable Stochastic Model Simulator for Analysis of Parallel Systems
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Multiterminal net routing for partial crossbar-based multi-FPGA systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on system-level interconnect prediction (SLIP)
Reconfigurable Elements for a Video Pipeline Processor
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A Run-Time Reconfigurable System for Gene-Sequence Searching
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Teramac-configurable custom computing
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Routability improvement using dynamic interconnect architecture
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Design methodologies for partially reconfigured systems
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Quantitative analysis of floating point arithmetic on FPGA based custom computing machines
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
MORRPH: a modular and reprogrammable real-time processing hardware
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
WILDFIRE(tm) Heterogeneous Adaptive Parallel Processing Systems
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
Mapping of generalized template matching onto reconfigurable computers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
A prototyping environment for hardware/software codesign in the COBRA project
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Custom Wide Counterflow Pipelines for High-Performance Embedded Applications
IEEE Transactions on Computers
ReCSiP: a reconfigurable cell simulation platform: accelerating biological applications with FPGA
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey
Journal of VLSI Signal Processing Systems
Applications of adaptive computing systems for signal processing challenges
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Run-time reconfigurable systems for digital signal processing applications: a survey
Journal of VLSI Signal Processing Systems
A dynamic-sized nonblocking work stealing deque
Distributed Computing - Special issue: DISC 04
Design, Debug, Deploy: The Creation of Configurable Computing Applications
Journal of Signal Processing Systems
A dynamic-sized nonblocking work stealing deque
A dynamic-sized nonblocking work stealing deque
WSEAS Transactions on Computers
Compiler-assisted data distribution for chip multiprocessors
Proceedings of the 19th international conference on Parallel architectures and compilation techniques
The C compiler generating a source file in VHDL for a dynamic dataflow machine
MMACTEE'09 Proceedings of the 11th WSEAS international conference on Mathematical methods and computational techniques in electrical engineering
Emulating transactional memory on FPGA multiprocessors
ARCS'11 Proceedings of the 24th international conference on Architecture of computing systems
Routability improvement using dynamic interconnect architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A performance evaluation of CUBE: one-dimensional 512 FPGA cluster
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
Embedded Systems Design
A software approach for combating asymmetries of non-volatile memories
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
Practically private: enabling high performance CMPs through compiler-assisted data classification
Proceedings of the 21st international conference on Parallel architectures and compilation techniques
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
Cube-4 implementations on the teramac custom computing machine
EGGH'96 Proceedings of the Eleventh Eurographics conference on Graphics Hardware
C1C: A configurable, compiler-guided STT-RAM L1 cache
ACM Transactions on Architecture and Code Optimization (TACO)
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