ACM Computing Surveys (CSUR)
SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
A preliminary architecture for a basic data-flow processor
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
A Dataflow Control Unit for C-to-Configurable Pipelines Compilation Flow
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Practical fpga programming in c
Practical fpga programming in c
Hardware-software co-synthesis of hard real-time systems with reconfigurable FPGAs
Computers and Electrical Engineering
Hi-index | 0.00 |
In order to convert High Level Language (HLL) into hardware, a Control Dataflow Graph (CDFG) is a fundamental element to be used. Related to this, Dataflow Architecture, can be obtained directly from the CDFG. The ChipCflow project is described as a system to convert HLL into a dynamic dataflow graph to be executed in dynamic reconfigurable hardware, exploring the dynamic reconfiguration. The ChipCflow consists of various parts: the compiler to convert the C program into a dataflow graph; the operators and its instances; the tagged-token; and the matching data. In this paper, a C compiler to convert C into a dataflow graph and the graph implementation in VHDL is described. Some results are presented in order to show a proof-of-concept for the project.