The Manchester prototype dataflow computer
Communications of the ACM - Special section on computer architecture
Distributed execution of functional programs using serial combinators
IEEE Transactions on Computers
DFSP: A Data Flow Signal Processor
IEEE Transactions on Computers
Structure handling in data-flow systems
IEEE Transactions on Computers - The MIT Press scientific computation series
The misconstrued semicolon: reconciling imperative languages and dataflow machines
The misconstrued semicolon: reconciling imperative languages and dataflow machines
Implementation and evaluation of a list-processing-oriented data flow machine
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Evaluation of a prototype data flow processor of the SIGMA-1 for scientific computations
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Stored data structures on the Manchester dataflow machine
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
A scalable dataflow structure store
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
The dataflow-based parallel inference machine to support two basic languages in KL1
Proc. of the IFIP TC 10 working conference on Fifth generation computer architectures
Preliminary measurements of the ETL LISP-based data-driven machine
Proc. of the IFIP TC 10 working conference on Fifth generation computer architectures
The Hughes Data Flow Multiprocessor: architecture for efficient signal and data processing
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Data-Driven and Demand-Driven Computer Architecture
ACM Computing Surveys (CSUR)
The VAL Language: Description and Analysis
ACM Transactions on Programming Languages and Systems (TOPLAS)
Functional Programming and Its Applications: An Advanced Course
Functional Programming and Its Applications: An Advanced Course
A preliminary architecture for a basic data-flow processor
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
First version of a data flow procedure language
Programming Symposium, Proceedings Colloque sur la Programmation
A data driven system based on a microprogrammed processor module
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
DDDP-a Distributed Data Driven Processor
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
A data flow processor array system: Design and analysis
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
A performance evaluation of a Lisp-based data-driven machine (EM-3)
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
A multiple processor data flow machine that supports generalized procedures
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
A multi-user data flow architecture
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
Building blocks for data flow prototypes
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
A GRAPH MODEL FOR PARALLEL COMPUTATIONS
A GRAPH MODEL FOR PARALLEL COMPUTATIONS
AN ABSTRACT IMPLEMENTATION FOR A GENERALIZED DATA FLOW LANGUAGE
AN ABSTRACT IMPLEMENTATION FOR A GENERALIZED DATA FLOW LANGUAGE
SAFETY AND OPTIMIZATION TRANSFORMATIONS FOR DATA FLOW PROGRAMS
SAFETY AND OPTIMIZATION TRANSFORMATIONS FOR DATA FLOW PROGRAMS
A hardware simulator for a multi-ring dataflow machine
A hardware simulator for a multi-ring dataflow machine
Demand-Driven Interpretation of FP Programs on a Data-Flow Multiprocessor
IEEE Transactions on Computers - Special issue on architectural support for programming languages and operating systems
Elimination of bottlenecks in dynamic dataflow processors
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
Characterizations of parallelism in applications and their use in scheduling
SIGMETRICS '89 Proceedings of the 1989 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
A parallel pipelined data flow coprocessor
CSC '89 Proceedings of the 17th conference on ACM Annual Computer Science Conference
A Buffer-Based Method for Storage Allocation in an Object-Oriented System
IEEE Transactions on Computers
Another view on parallel speedup
Proceedings of the 1990 ACM/IEEE conference on Supercomputing
Task allocation in data flow multiprocessors: an annotated bibliography
ACM SIGARCH Computer Architecture News - Symposium on parallel algorithms and architectures
A hands-on dataflow architecture/programming course
ACM SIGCSE Bulletin
A quantitative analysis of locality in dataflow programs
MICRO 24 Proceedings of the 24th annual international symposium on Microarchitecture
ECOS graphs: a dataflow programming language
SAC '92 Proceedings of the 1992 ACM/SIGAPP symposium on Applied computing: technological challenges of the 1990's
A quantitative approach for teaching parallel computing
SIGCSE '92 Proceedings of the twenty-third SIGCSE technical symposium on Computer science education
A multi-purpose dataflow simulator
SIGCSE '93 Proceedings of the twenty-fourth SIGCSE technical symposium on Computer science education
Portable run-time support for dynamic object-oriented parallel processing
ACM Transactions on Computer Systems (TOCS)
A basic architecture supporting LGDG computation
ICS '90 Proceedings of the 4th international conference on Supercomputing
ANSS '92 Proceedings of the 25th annual symposium on Simulation
Efficient logic variables for distributed computing
ACM Transactions on Programming Languages and Systems (TOPLAS)
Speculative Memory Cloaking and Bypassing
International Journal of Parallel Programming - Special issue on the 30th annual ACM/IEEE international symposium on microarchitecture, part II
An object-oriented design for a dataflow simulator
ACM-SE 30 Proceedings of the 30th annual Southeast regional conference
Analysis of integration models for service composition
WOSP '02 Proceedings of the 3rd international workshop on Software and performance
A Hybrid Scheme for Processing Data Structures in a Dataflow Environment
IEEE Transactions on Parallel and Distributed Systems
Compiling Application-Specific Hardware
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Modeling Stream-Based Applications Using the SBF Model of Computation
Journal of VLSI Signal Processing Systems
Exploiting Data-Flow for Fault-Tolerance in a Wide-Area Parallel System
SRDS '96 Proceedings of the 15th Symposium on Reliable Distributed Systems
A design representation for high level synthesis
EURO-DAC '90 Proceedings of the conference on European design automation
Advances in dataflow programming languages
ACM Computing Surveys (CSUR)
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Exploiting Program Branch Probabilities in Hardware Compilation
IEEE Transactions on Computers
A Cycle-Accurate ISS for a Dynamically Reconfigurable Processor Architecture
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04
Dynamic loop pipelining in data-driven architectures
Proceedings of the 2nd conference on Computing frontiers
A Low Power Embedded Dataflow Coprocessor
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Implementing declarative overlays
Proceedings of the twentieth ACM symposium on Operating systems principles
Exploiting an abstract-machine-based framework in the design of a Java ILP processor
Journal of Systems Architecture: the EUROMICRO Journal
Evaluating a low-power dual-core architecture
APPT'07 Proceedings of the 7th international conference on Advanced parallel processing technologies
WSEAS Transactions on Computers
WSEAS Transactions on Computers
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
PRADA: a high-performance reconfigurable parallel architecture based on the dataflow model
International Journal of High Performance Systems Architecture
The C compiler generating a source file in VHDL for a dynamic dataflow machine
MMACTEE'09 Proceedings of the 11th WSEAS international conference on Mathematical methods and computational techniques in electrical engineering
Data-driven regular reconfigurable arrays: design space exploration and mapping
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
The design of a dataflow coprocessor for low power embedded hierarchical processing
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
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Dataflow machines are programmable computers of which the hardware is optimized for fine-grain data-driven parallel computation. The principles and complications of data-driven execution are explained, as well as the advantages and costs of fine-grain parallelism. A general model for a dataflow machine is presented and the major design options are discussed.Most dataflow machines described in the literature are surveyed on the basis of this model and its associated technology. For general-purpose computing the most promising dataflow machines are those that employ packet-switching communication and support general recursion. Such a recursion mechanism requires an extremely fast mechanism to map a sparsely occupied virtual space to a physical space of realistic size. No solution has yet proved fully satisfactory.A working prototype of one processing element is described in detail. On the basis of experience with this prototype, some of the objections raised against the dataflow approach are discussed. It appears that the overhead due to fine-grain parallelism can be made acceptable by sophisticated compiling and employing special hardware for the storage of data structures. Many computing-intensive programs show sufficient parallelism. In fact, a major problem is to restrain parallelism when machine resources tend to get overloaded. Another issue that requires further investigation is the distribution of computation and data structures over the processing elements.