First version of a data flow procedure language
Programming Symposium, Proceedings Colloque sur la Programmation
Building blocks for data flow prototypes
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
ACM Computing Surveys (CSUR)
Analytical modeling and architectural modifications of a dataflow computer
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Performance Evaluation of a Dataflow Architecture
IEEE Transactions on Computers
DDDP-a Distributed Data Driven Processor
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
Instruction set design issues relating to a static dataflow computer
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
A vector and array multiprocessor extension of the sylvan architecture
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
Design and Performance Evaluation of EXMAN: An EXtended MANchester Data Flow Computer
IEEE Transactions on Computers
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This paper discusses the design of a prototype data flow machine that has memory management hardware in each memory block. This facility allows loading and deleting code that is produced by independent compilations. The first sections of the paper deal with the general architecture of the machine and the format specifications for the instruction cells, logical addresses, and switch packets. The paper concludes with a discussion of the mapping hardware used in the memory blocks. The results of a simulation study for this subsystem are also presented.