EDISON-80, a language for modular programming of parallel processes
Information Processing Letters
Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
A scalable dataflow structure store
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
ACM Computing Surveys (CSUR)
Fine-grain parallel computing: the dataflow approach
Proc. of an advanced course on Future parallel computers.
Incorporating data flow ideas into von neumann processors for parallel execution
IEEE Transactions on Computers
Toward a dataflow/von Neumann hybrid architecture
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Resource requirements of dataflow programs
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Two fundamental issues in multiprocessing
4th International DFVLR Seminar on Foundations of Engineering Sciences on Parallel Computing in Science and Engineering
I-structures: data structures for parallel computing
ACM Transactions on Programming Languages and Systems (TOPLAS)
Can dataflow subsume von Neumann computing?
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Data-Driven and Demand-Driven Computer Architecture
ACM Computing Surveys (CSUR)
The DRAMA Principle and Data Type Architectures
Datenbanktechnologie, Einsatz großer, verteilter und intelligenter Datenbanken, Tagung II/1979 des German Chapter of the ACM
Hierarchical function distribution - a design principle for advanced multicomputer architectures
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
A multiple processor data flow machine that supports generalized procedures
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
Data structure architectures - a major operational principle
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
A multi-level parallelism architecture
ACM SIGARCH Computer Architecture News
Asynchrony in parallel computing: from dataflow to multithreading
Progress in computer research
Asynchrony in parallel computing: from dataflow to multithreading
Progress in computer research
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In order to combine the benefits of dataflow and control-flow computation while avoiding the pitfalls of both, the authors propose a two-level model of large-grain dataflow computation, called LGDG computation. A formalism has been provided in a previous paper to prove the determinism of parallel program execution under this model. The current paper presents the basic LGDG computer architecture which is organized at two levels, called the graph level and the node level. The kernel of the node-level architecture is characterized by its non-branch RISC (N-RISC) feature, which ensures an optimal utilization of pipeline processing. This kernel is supported by various co-processors based on the principle of function migration. We will show in this paper how the graph-level architecture can be reduced to a matching unit, extended by a writable control store, through node migration and node aggregation. As a result, the matching overhead is drastically reduced, thus eliminating the most severe bottleneck of existing 'fine-grain' dataflow computers.