Routability improvement using dynamic interconnect architecture

Authors:
Jianmin Li;Chung-Kuan Cheng
Affiliations:
Synopsys, Inc., Mountain View, CA;Department of Computer Science and Engineering, University of California at San Diego, La Jolla, CA
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
1998

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Abstract

We present a dynamic architecture for field programmable gate array (FPGA)-based computing systems with the introduction of dynamic field-programmable interconnection devices. The central principle of this new architecture is based on the concept of time-sharing, which we use to efficiently exploit the potential communication bandwidth of interconnection resources. This new architecture not only releases FPGA pin limitation to some degree, but also greatly increases the routability of interconnection networks, resulting in higher overall performance of FPGA-based systems.