pRAM: the probabilistic RAM neural processor

Authors:
Trevor G. Clarkson
Affiliations:
King's College London, London, UK
Venue:
Hardware implementation of intelligent systems
Year:
2001

Citing 3
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Abstract

The pRAM has been implemented as a VLSI processor incorporating 256 neurons with on-chip learning. Several such processors may be connected to form larger networks. The pRAM was originally conceived to model the noisy release of neurotransmitter vesicles in synaptic connections. In a network, it forms n-tuples and may operate as a noisy lookup table with generalization. The reinforcement training used is also biologically realistic and has a scope ranging from a single neuron to the whole network, the architecture being user defined.