A general framework for parallel distributed processing
Parallel distributed processing: explorations in the microstructure of cognition, vol. 1
Learning and relearning in Boltzmann machines
Parallel distributed processing: explorations in the microstructure of cognition, vol. 1
Learning internal representations by error propagation
Parallel distributed processing: explorations in the microstructure of cognition, vol. 1
Higher order recurrent networks and grammatical inference
Advances in neural information processing systems 2
A continuous input RAM-based stochastic neural model
Neural Networks
Stochastic Neural Computation I: Computational Elements
IEEE Transactions on Computers
pRAM: the probabilistic RAM neural processor
Hardware implementation of intelligent systems
A spiking neuron model: applications and learning
Neural Networks
| Hi-index | 14.99 |
Hardware-realizable learning probabilistic RAMs (pRAMs) which implement local reinforcement rules utilizing synaptic rather than threshold noise in the stochastic search procedure are described. The design allows for both global and local rewards and penalties (in this latter case implementing a modified version of backpropagation). The architecture allows for serial updating of the weights of a pRAM net according to a reward/penalty learning rule. It is possible to generate a new set of pRAM outputs at least every 100 mu s, which is faster than the response time of biological neurons.