Logic testing and design for testability
Logic testing and design for testability
IEEE Spectrum
Fault-based automatic test generator for linear analog circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
On the Design of Self-Checking Boundary Scannable Boards
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
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This paper describes a new approach for fault diagnosis of analog multi-phenomenon systems with low testability. The developed algorithms include identification of ambiguity groups, fault diagnosis methodology and solving low testability equations. Our aim is to identify a minimum number of faulty parameters that satisfy the test equations called a minimum form solution. An algorithm to find a minimum form solution is presented, which is based on the solution invariant matrix and an identification of singular cofactors of this matrix. System simulation using a developed C++ and Matlab programs was performed to test different faulty circuits. Test examples are discussed and simulation results are presented.