I-structures: data structures for parallel computing
ACM Transactions on Programming Languages and Systems (TOPLAS)
Active messages: a mechanism for integrated communication and computation
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
LogP: towards a realistic model of parallel computation
PPOPP '93 Proceedings of the fourth ACM SIGPLAN symposium on Principles and practice of parallel programming
The super-actor machine: a hybrid dataflow/Von Neumann architecture
The super-actor machine: a hybrid dataflow/Von Neumann architecture
An efficient hybrid dataflow architecture model
Journal of Parallel and Distributed Computing
Software overhead in messaging layers: where does the time go?
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
Design of cache memories for multi-threaded dataflow architecture
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
A design study of the EARTH multiprocessor
PACT '95 Proceedings of the IFIP WG10.3 working conference on Parallel architectures and compilation techniques
Caching Single-Assignment Structures to Build a Robust Fine-Grain Multi-Threading System
IPDPS '00 Proceedings of the 14th International Symposium on Parallel and Distributed Processing
Exploiting Global Data Locality in Non-Blocking Multithreaded Architectures
ISPAN '97 Proceedings of the 1997 International Symposium on Parallel Architectures, Algorithms and Networks
I-Structure Software Cache: A Split-Phase Transaction Runtime Cache System
PACT '96 Proceedings of the 1996 Conference on Parallel Architectures and Compilation Techniques
MANNA: Prototype of a Distributed Memory Architecture with Maximized Sustained Performance
PDP '96 Proceedings of the 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96)
Earth: an efficient architecture for running threads
Earth: an efficient architecture for running threads
High-performance local area communication with fast sockets
ATEC '97 Proceedings of the annual conference on USENIX Annual Technical Conference
Non-strict execution in parallel and distributed computing
International Journal of Parallel Programming
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We present the design, implementation, and evaluation of single assignment data structures and of a software controlled cache in an existing multi-threaded architecture platform – the Efficient Architecture for Running Threads (EARTH). The I-Structure Software-Controlled Cache (ISSC) exploits temporal and spatial locality of EARTH split-phased memory transactions for single-assignment memory references. Our experimental evaluation indicates that the caching mechanism for single-assignment storage makes the EARTH memory system more robust to variations in the latency of memory operations. As a consequence the system can be ported to a wider range of machine platforms and deliver speedup for both regular and irregular application.