Safety analysis of timing properties in real-time systems
IEEE Transactions on Software Engineering - Special issue on reliability and safety in real-time process control
A graph-theoretic approach for timing analysis and its implementation
IEEE Transactions on Computers - Special Issue on Real-Time Systems
Software pipelining: an effective scheduling technique for VLIW machines
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
Reasoning About Time in Higher-Level Language Software
IEEE Transactions on Software Engineering
Temporal logic for real time systems
Temporal logic for real time systems
Specifying real-time properties with metric temporal logic
Real-Time Systems
The C programming language
Global instruction scheduling for superscalar machines
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
The C++ programming language (2nd ed.)
The C++ programming language (2nd ed.)
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
Theoretical Computer Science
Iterative modulo scheduling: an algorithm for software pipelining loops
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
An axiomatic basis for computer programming
Communications of the ACM
Conversion of control dependence to data dependence
POPL '83 Proceedings of the 10th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Compiling Real-Time Programs With Timing Constraint Refinement and Structural Code Motion
IEEE Transactions on Software Engineering
Examples of a Real-Time Temporal Logic Specification
The Analysis of Concurrent Systems
Logics and Models of Real Time: A Survey
Proceedings of the Real-Time: Theory in Practice, REX Workshop
Proving real-time properties of programs with temporal logic
SOSP '81 Proceedings of the eighth ACM symposium on Operating systems principles
Real-time programming and asynchronous message passing
PODC '83 Proceedings of the second annual ACM symposium on Principles of distributed computing
A Fast Algorithm for Scheduling Time-Constrained Instructions on Processors with ILP
PACT '98 Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques
Loop Quantization: an Analysis and Algorithm
Loop Quantization: an Analysis and Algorithm
Compilers, architectures and synthesis for embedded computing: retrospect and prospect
CASES '10 Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems
The arrow of time through the lens of computing
Time for verification
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Enabled by RISC technologies, low-cost commodity microprocessors are performing at ever increasing levels, significantly via instruction level parallelism (ILP). This in turn increases the opportunities for their use in a variety of day-to-day applications ranging from the simple control of appliances such as microwave ovens, to sophisticated systems for cabin control in modern aircraft. Indeed, “embedded” applications such as these represent segments in the computer industry with great potential for growth. However, this growth is currently impeded by the lack of robust optimizing compiler technologies that support the assured, rapid and inexpensive prototyping of real-time software in the context of microprocessors with ILP. In this paper we describe a novel notation, TimeC, for specifying timing constraints in programs, iindependent of the base language being used to develop the embedded application; TimeC specifications are language independent and can be instrumented into imperative and object-oriented languages non-intrusively. As we will show, the program synthesis problem that arise out of Time_tract specifications, a subset of TimeC, are always “tractable.” In contrast, a range of specification mechanisms proposed earlier yield substantially intractable synthesis questions, thereby limiting their potential utility. We will compare the tractability and related expressive power issues between TimeC and some of the extant mechanisms for specifying properties of timed programs.