Combinatorics, complexity, and randomness
Communications of the ACM
HPS, a new microarchitecture: rationale and introduction
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
Critical issues regarding HPS, a high performance microarchitecture
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Scheduling time-critical instructions on RISC machines
POPL '90 Proceedings of the 17th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Scheduling time-critical instructions on RISC machines
ACM Transactions on Programming Languages and Systems (TOPLAS)
Instruction-level parallel processing: history, overview, and perspective
The Journal of Supercomputing - Special issue on instruction-level parallelism
Iterative modulo scheduling: an algorithm for software pipelining loops
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
CASES '00 Proceedings of the 2000 international conference on Compilers, architecture, and synthesis for embedded systems
Scheduling time-constrained instructions on pipelined processors
ACM Transactions on Programming Languages and Systems (TOPLAS)
Optimizing compilers for modern architectures: a dependence-based approach
Optimizing compilers for modern architectures: a dependence-based approach
The Design Automation Conference: 25 Years of Excellence
IEEE Design & Test
Embedded Computing: New Directions in Architecture and Automation
HiPC '00 Proceedings of the 7th International Conference on High Performance Computing
Compiler Optimizations for Adaptive EPIC Processors
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
Recent advances on two-dimensional bin packing problems
Discrete Applied Mathematics
Architectural support for the efficient generation of code for horizontal architectures
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
RISC I: A Reduced Instruction Set VLSI Computer
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
An expandable multiprocessor architecture for video graphics (Preliminary Report)
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
MIPS: a VLSI processor architecture
MIPS: a VLSI processor architecture
On the Complexity of Precedence Constrained Scheduling
On the Complexity of Precedence Constrained Scheduling
Adaptive explicitly parallel instruction computing
Adaptive explicitly parallel instruction computing
Compiler optimization of embedded applications for an adaptive SoC architecture
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Trace Scheduling: A Technique for Global Microcode Compaction
IEEE Transactions on Computers
The temporal logic of programs
SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
Modern Operating Systems: Jumpstart Sampling Edition
Modern Operating Systems: Jumpstart Sampling Edition
IBM Journal of Research and Development
Trimaran: an infrastructure for research in instruction-level parallelism
LCPC'04 Proceedings of the 17th international conference on Languages and Compilers for High Performance Computing
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