Very High-Speed True Random Noise Generator

  • Authors:
  • Ada Fort;Fabrizio Cortigiani;Santina Rocchi;Valerio Vignoli

  • Affiliations:
  • Dipartimento di Ingegneria dell'Informazione, Università di Siena, via Roma 56, I-53100 Siena;Dipartimento di Ingegneria dell'Informazione, Università di Siena, via Roma 56, I-53100 Siena;Dipartimento di Ingegneria dell'Informazione, Università di Siena, via Roma 56, I-53100 Siena;Dipartimento di Ingegneria dell'Informazione, Università di Siena, via Roma 56, I-53100 Siena vignoli@ing.unisi.it http://www.dii.unisi.it

  • Venue:
  • Analog Integrated Circuits and Signal Processing
  • Year:
  • 2003

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Abstract

In this work an original CMOS implementation of a discrete-time deterministic-chaos algorithm for random bit generation is presented. The proposed circuit topology prevents the degradation of the generated-sequence statistical properties that can be caused by several factors, including the parameter spreading of the technological processes. Experimental results show that, with a final rate of 3 Mbit/s, the circuit is compliant with the most recent security requirements for cryptographic modules issued by the American National Institute of Standards and Technologies.