Autodirective microphone systems for natural communication with speech recognizers
HLT '91 Proceedings of the workshop on Speech and Natural Language
Speech recognition in noisy environments with the aid of microphone arrays
Speech Communication
Acoustic Source Location in a Three-Dimensional Space Using Crosspower Spectrum Phase
ICASSP '97 Proceedings of the 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP '97) -Volume 1 - Volume 1
Tracking Multiple Talkers Using Microphone-Array Measurements
ICASSP '97 Proceedings of the 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP '97) -Volume 1 - Volume 1
A framework for speech source localization using sensor arrays
A framework for speech source localization using sensor arrays
HLT '91 Proceedings of the workshop on Speech and Natural Language
ICASSP '96 Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 02
Audiovisual Arrays for Untethered Spoken Interfaces
ICMI '02 Proceedings of the 4th IEEE International Conference on Multimodal Interfaces
A robust method to extract talker azimuth orientation using a large-aperture microphone array
IEEE Transactions on Audio, Speech, and Language Processing
A high accuracy, low-latency, scalable microphone-array system for conversation analysis
Proceedings of the 2012 ACM Conference on Ubiquitous Computing
Wavefield Analysis Over Large Areas Using Distributed Higher Order Microphones
IEEE/ACM Transactions on Audio, Speech and Language Processing (TASLP)
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The Huge Microphone Array project began in February 1994 to design, construct, debug, and test a real-time 512- microphone array system and to develop algorithms for it. Analysis of known algorithms indicated that signal-processing performance of over 6 Gflops would be required, while the need for portabilityýfitting it into a small vanýalso set an upper limit to the power required. These trade-offs and many others have led to a unique design in both hardware and software. This two-part article presents the full design and its justifications. The authors also discuss performance for a few important algorithms relative to the use of processing capability, response latency, and difficulty of programming.