Race-free interconnection networks and multiprocessor consistency
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Cache coherence in large-scale shared-memory multiprocessors: issues and comparisons
ACM Computing Surveys (CSUR)
Concurrency control in asynchronous computations
Concurrency control in asynchronous computations
IEEE Transactions on Parallel and Distributed Systems
Implementing sequentially consistent shared objects using broadcast and point-to-point communication
Journal of the ACM (JACM)
Multicast snooping: a new coherence method using a multicast address network
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
Weak ordering—a new definition
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Time, clocks, and the ordering of events in a distributed system
Communications of the ACM
Using Lamport Clocks to Reason About Relaxed Memory Models
HPCA '99 Proceedings of the 5th International Symposium on High Performance Computer Architecture
Data coherence protocols: the home update protocol
Data coherence protocols: the home update protocol
An Isotach Implementation for Myrinet
An Isotach Implementation for Myrinet
Logical time coherence maintenance
Logical time coherence maintenance
Timestamp snooping: an approach for extending SMPs
ACM SIGPLAN Notices
Timestamp snooping: an approach for extending SMPs
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Clock Synchronization in Cell BE Traces
Euro-Par '08 Proceedings of the 14th international Euro-Par conference on Parallel Processing
Cell broadband engine processor performance optimization: tracing tools implementation and use
IBM Journal of Research and Development
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The authors describe a class of directory coherence protocols, called delta coherence protocols, that use network guarantees to support a new and highly concurrent approach to maintain a consistent shared memory. Delta coherence protocols are more concurrent than other coherence protocols because they let processes pipeline memory accesses without violating sequential consistency; support multiple concurrent readers and writers to the same cache block; and let processes access multiple shared variables atomically without invalidating copies held by other processes or otherwise obtaining exclusive access to the referenced variables. Delta protocols include both update and invalidate protocols. In this article, the authors describe the simplest, most basic delta protocol, an update protocol called the home update protocol.Delta protocols are based on isotach network guarantees. An isotach network maintains a logical time system that lets each process to predict and control the logical time at which its messages are received. The authors prove the home update protocol is correct using logical time to reason about the order in which requests are executed.