A D&T Roundtable: System-on-Chip Specification and Modeling Using C++: Challenges and Opportunities

Authors:
IEEE Design & Test Staff
Affiliations:
-
Venue:
IEEE Design & Test
Year:
2001

Citing 0
Cited 4

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Fast exploration of bus-based on-chip communication architectures

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Fast exploration of bus-based communication architectures at the CCATB abstraction

ACM Transactions on Embedded Computing Systems (TECS)
High level modeling and automated generation of heterogeneous SoC architectures with optimized custom reconfigurable cores and on-chip communication media

Journal of Systems Architecture: the EUROMICRO Journal

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Abstract

First Page of the Article