Powering networks on chips: energy-efficient and reliable interconnect design for SoCs
Proceedings of the 14th international symposium on Systems synthesis
System Design with SystemC
Interconnection Networks: An Engineering Approach
Interconnection Networks: An Engineering Approach
Platform-Based Design and Software Design Methodology for Embedded Systems
IEEE Design & Test
Evaluation of the Traffic-Performance Characteristics of System-on-Chip Communication Architectures
VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
A Comparison of Five Different Multiprocessor SoC Bus Architectures
DSD '01 Proceedings of the Euromicro Symposium on Digital Systems Design
Transaction level modeling: an overview
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Using TLM for Exploring Bus-based SoC Communication Architectures
ASAP '05 Proceedings of the 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors
SystemC-based Design Methodology for Reconfigurable System-on-Chip
DSD '05 Proceedings of the 8th Euromicro Conference on Digital System Design
Analysis and evaluation of a hybrid interconnect structure for FPGAs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
ReChannel: Describing and simulating reconfigurable hardware in systemC
ACM Transactions on Design Automation of Electronic Systems (TODAES)
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
AHS '07 Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems
Hybrid Communication Medium for Adaptive SoC Architectures
AHS '07 Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems
Efficient High-Level Power Estimation for Multi-standard Wireless Systems
ISVLSI '08 Proceedings of the 2008 IEEE Computer Society Annual Symposium on VLSI
Cost-effective triple-mode reconfigurable pipeline FFT/IFFT/2-D DCT processor
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
FPGA implementation of a re-configurable fft for multi-standard systems in software radio context
IEEE Transactions on Consumer Electronics
Platune: a tuning framework for system-on-a-chip platforms
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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In this paper we propose a framework for modeling and automated generation of heterogeneous SoC architectures with emphasis on reconfigurable component integration and optimized communication media. In order to facilitate rapid development of SoC architectures, communication-centric platforms for data intensive applications, high level modeling of reconfigurable components for quick simulation and a tool for generation of complete SoC architectures is presented. Four different communication-centric platforms based on traditional bus, crossbar, hierarchical bus and novel hybrid communication media are proposed. These communication-centric platforms are proposed to cater for the different communication requirement of future SoC architectures. Multi-Standard telecommunication application is chosen as our target application domain and a case study of WiMAX is used as a real world example to demonstrate the effectiveness of our approach. A system consisting of an ARM processor, reconfigurable FFT and reconfigurable Viterbi decoder is considered with the option of system scalability for future upgrades. Behavior of system with different communication platforms is analyzed for its throughput and power characteristics with different reconfigurable scenarios to show the effectiveness of our approach.