A simulation tool for dynamically reconfigurable field programmable gate arrays
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An open-source tool for simulation of partially reconfigurable systems using SystemC
ISVLSI '06 Proceedings of the IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures
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Proceedings of the Conference on Design, Automation and Test in Europe
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International Journal of Reconfigurable Computing - Special issue on selected papers from ReConFig 2008
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Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
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ACM Transactions on Embedded Computing Systems (TECS)
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With the ongoing integration of (dynamic) reconfiguration into current system models, new methodologies and tools are needed to help the designer during the development process. This article introduces a language extension for SystemC along with a design methodology for describing and simulating dynamically reconfigurable systems at all levels of abstraction. The presented library provides maximum freedom of description of reconfiguration behavior and its control, while featuring simulation of runtime configuration, removal, and exchange of custom modules as well as third-party IP-cores during the complete architecture refinement process. When designing at RT-level, the resulting hardware description can easily be synthesized by standard synthesis tools.