Interconnection Networks: An Engineering Approach

Authors:
Jose Duato;Sudhakar Yalamanchili;Lionel Ni
Affiliations:
-;-;-
Venue:
Interconnection Networks: An Engineering Approach
Year:
1997

Citing 0
Cited 239

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Multidestination Message Passing in Wormhole k-ary n-cube Networks with Base Routing Conformed Paths

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Fault-Tolerant Communication Algorithms in Toroidal Networks

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A Testbed for Evaluation of Fault-Tolerant Routing in Multiprocessor Interconnection Networks

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Partial Precedence Constrained Scheduling

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Flexible and Efficient Routing Based on Progressive Deadlock Recovery

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A New Self-Routing Multicast Network

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Fault-Tolerant Adaptive and Minimal Routing in Mesh-Connected Multicomputers Using Extended Safety Levels

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A new switch chip for IBM RS/6000 SP systems

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A Formal Model of Message Blocking and Deadlock Resolution in Interconnection Networks

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Implementing Multidestination Worms in Switch-Based Parallel Systems: Architectural Alternatives and Their Impact

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Timestamp snooping: an approach for extending SMPs

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Data Locality Exploitation in the Decomposition of Regular Domain Problems

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Nonblocking WDM Multicast Switching Networks

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A VLSI wrapped wave front arbiter for crossbar switches

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Exploiting Network Locality for CC-NUMA Multiprocessors

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An Analytical Model of Adaptive Wormhole Routing in Hypercubes in the Presence of Hot Spot Traffic

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Unicast-based broadcast: an analysis for the hypercube with adaptive routing

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Analysis of adaptive wormhole-routed torus networks with IPP input traffic

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Architectural Support for Efficient Multicasting in Irregular Networks

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Timestamp snooping: an approach for extending SMPs

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Optimal All-to-All Personalized Exchange in a Class of Optical Multistage Networks

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Efficient Multicast on Irregular Switch-Based Cut-Through Networks with Up-Down Routing

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Analytical Modeling of Wormhole-Routed k-Ary n-Cubes in the Presence of Hot-Spot Traffic

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MPI-LAPI: An Efficient Implementation of MPI for IBM RS/6000 SP Systems

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Pipelined All-to-All Broadcast in All-Port Meshes and Tori

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A General Theory for Deadlock-Free Adaptive Routing Using a Mixed Set of Resources

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Near-Optimal All-to-All Broadcast in Multidimensional All-Port Meshes and Tori

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Four-Ary Tree-Based Barrier Synchronization for 2D Meshes without Nonmember Involvement

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Fast Gossiping in Square Meshes/Tori with Bounded-Size Packets

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Recursive Diagonal Torus: An Interconnection Network for Massively Parallel Computers

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A Cost-Effective Approach to Deadlock Handling in Wormhole Networks

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Analysis of Distributed Routing Balancing behavior

Proceedings of the 2002 ACM symposium on Applied computing
Communication delay in wormhole-routed torus networks

Proceedings of the 2002 ACM symposium on Applied computing
Probability vectors: a new fault-tolerant routing algorithm for k-ary n-cubes

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A simple mathematical model of adaptive routing in wormhole k-ary n-cubes

Proceedings of the 2002 ACM symposium on Applied computing
Towards a scalable broadcast in wormhole-switched mesh networks

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Memory optimization in single chip network switch fabrics

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SafetyNet: improving the availability of shared memory multiprocessors with global checkpoint/recovery

ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Worst-case traffic for oblivious routing functions

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HIPIQS: A High-Performance Switch Architecture Using Input Queuing

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HiPER: A Compact Narrow Channel Router with Hop-by-Hop Error Correction

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Boosting the Performance of Myrinet Networks

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A Performance Model of Adaptive Wormhole Routing in k-Ary n-Cubes in the Presence of Digit-Reversal Traffic

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A Comparative Study of Switching Methods in Multicomputer Networks

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Broadcasting in all-output-port meshes of trees with distance-insensitive switching

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Scheduling GEN_BLOCK Array Redistribution

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A comparative study of arbitration algorithms for the Alpha 21364 pipelined router

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Hypermeshes: implementation and performance

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Networks on Chips: A New SoC Paradigm

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Filtering Random Graphs to Synthesize Interconnection Networks with Multiple Objectives

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Boosting the Performance of Myrinet Networks

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MediaWorm: A QoS Capable Router Architecture for Clusters

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CPU and incremental memory allocation in dynamic parallelization of SQL Queries

Parallel Computing
Evaluation of Alternative Arbitration Policies for Myrinet Switches

IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Comparative Analysis of Adaptive Wormhole Routing in Tori and Hypercubes in the Presence of Hotspot Traffic

IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
A Performance Model for k-Ary n-Cube Networks with Self-Similar Traffic

IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Layered Shortest Path (LASH) Routing in Irregular System Area Networks

IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Nonblocking k-Fold Multicast Networks

IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
On the Performance of Cubic Networks under Correlated Traffic Pattern

IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Performance Analysis of Wormhole-Switched k-Ary n-Cubes with Bursty Traffic

IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Near-Optimal All-to-All Broadcast in Multidimensional All-Port Meshes and Tori

IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Performance Benefits of NIC-Based Barrier on Myrinet/GM

IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
An O[n3/ z3] Reduction Procedure for Determining the Maximum Degree of Parallelism in Parallel Applications

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DDG Task Recovery for Cluster Computing

PPAM '01 Proceedings of the th International Conference on Parallel Processing and Applied Mathematics-Revised Papers
Efficient Interconnects for Clustered Microarchitectures

Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques
Performance Sensitivity of Routing Algorithms to Failures in Networks of Worksations

ISHPC '00 Proceedings of the Third International Symposium on High Performance Computing
An Analytic Model for Communication Latency in Wormhole-Switched k-ary n-Cube Interconnection Networks with Digit-Reversal Traffic

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Avoiding Network Congestion with Local Information

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How Can We Design Better Networks for DSM Systems?

PCRCW '97 Proceedings of the Second International Workshop on Parallel Computer Routing and Communication
An Analytical Model of Deterministic Routing in the Presence of Hot-Spot Traffic

Euro-Par '01 Proceedings of the 7th International Euro-Par Conference Manchester on Parallel Processing
Congestion Control Based on Transmission Times

Euro-Par '02 Proceedings of the 8th International Euro-Par Conference on Parallel Processing
Analysis of Pipelined Circuit Switching in Cube Networks (Research Note)

Euro-Par '00 Proceedings from the 6th International Euro-Par Conference on Parallel Processing
Deadlock Avoidance for Wormhole Based Switches

Euro-Par '00 Proceedings from the 6th International Euro-Par Conference on Parallel Processing
Suboptimal Communication Schedule for GEN_BLOCK Redistribution (Best Student Paper Award: Honourable Mention)

VECPAR '00 Selected Papers and Invited Talks from the 4th International Conference on Vector and Parallel Processing
Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs

FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Multihop All-to-All Broadcast on WDM Optical Networks

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Analysis of k-ary n-cubes with dimension-ordered routing

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Fault-Tolerant Broadcasting in 2-D Wormhole-Routed Meshes

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VLSI Architecture: Past, Present, and Future

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Communication Delay in Wormhole-Switched Tori Networks under Bursty Workloads

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Fast Dynamic Reconfiguration in Irregular Networks

ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
A Performance Model of Adaptive Routing in k-Ary n-Cubes with Matrix-Transpose Traffic

ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
On the Design of Communication-Aware Task Scheduling Strategies for Heterogeneous Systems

ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
Nonblocking WDM Multicast Switching Networks

ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
The Thread-Based Protocol Engines for CC-NUMA Multiprocessors

ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
GOAL: a load-balanced adaptive routing algorithm for torus networks

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Performance analysis of the Alpha 21364-based HP GS1280 multiprocessor

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Routing networks for distributed hash tables

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A simple fault-tolerant adaptive and minimal routing approach in 3-D meshes

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Analytical modelling of wormhole-routed k-ary n-cubes in the presence of matrix-transpose traffic

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A New Self-Routing Multicast Network

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Minimizing Total Communication Distance of a Time-Step Optimal Broadcast in Mesh Networks

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An analytical model of wormhole-routed hypercubes under broadcast traffic

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Performance prediction of wormhole switching in hypercubes with bursty traffic pattern

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Higher dimensional hexagonal networks

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Efficient Collective Communications in Dual-Cube

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Optimal gossiping in paths and cycles

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Supporting adaptive routing in IBA switches

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Communication delay in hypercubic networks with LRD traffic

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A Power and Performance Model for Network-on-Chip Architectures

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System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip

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RASoC: A Router Soft-Core for Networks-on-Chip

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Efficient algorithms for checking the equivalence of multistage interconnection networks

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Collective communication patterns on the quadrics network

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A Performance Model for Wormhole-Switched Interconnection Networks under Self-Similar Traffic

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Packetization and routing analysis of on-chip multiprocessor networks

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FIFO power optimization for on-chip networks

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Analysis of true fully adaptive routing with software-based deadlock recovery

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Power-aware communication optimization for networks-on-chips with voltage scalable links

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Reusing an on-chip network for the test of core-based systems

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On the performance of multicomputer interconnection networks

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Performance modelling and evaluation of virtual channels in multicomputer networks with bursty traffic

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The KR-Benes Network: A Control-Optimal Rearrangeable Permutation Network

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Siamese-Twin: A Dynamically Fault-Tolerant Fat-Tree

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Message Passing for Linux Clusters with Gigabit Ethernet Mesh Connections

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Run-time support for heterogeneous multitasking on reconfigurable SoCs

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LiPaR: A light-weight parallel router for FPGA-based networks-on-chip

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Quality-of-service and error control techniques for mesh-based network-on-chip architectures

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The recursive transpose-connected cycles (RTCC) interconnection network for multiprocessors

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An Efficient Tree-Based Multicasting Algorithm on Wormhole-Routed Star Graph Interconnection Networks Embedded with Hamiltonian Path

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Prediction of communication delay in torus networks under multiple time-scale correlated traffic

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Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs

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High performance support of parallel virtual file system (PVFS2) over Quadrics

Proceedings of the 19th annual international conference on Supercomputing
Fault-tolerant routing and multicasting in hypercubes using a partial path set-up

Parallel Computing
The RTCC-pyramid: A Versatile Pyramid network

HPCASIA '05 Proceedings of the Eighth International Conference on High-Performance Computing in Asia-Pacific Region
The routability of multiprocessor network topologies in FPGAs

Proceedings of the 2006 international workshop on System-level interconnect prediction
Stochastic Analysis of Deterministic Routing Algorithms in the Presence of Self-Similar Traffic

The Journal of Supercomputing
A flit level simulator for wormhole routing

ACM-SE 38 Proceedings of the 38th annual on Southeast regional conference
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks

Proceedings of the 33rd annual international symposium on Computer Architecture
Switch fabric design for high performance IP routers: a survey

Journal of Systems Architecture: the EUROMICRO Journal
A plane-based broadcast algorithm for multicomputer networks

Journal of Systems Architecture: the EUROMICRO Journal
Fault-tolerant multicasting in hypercubes using local safety information

Journal of Parallel and Distributed Computing
Fault-Tolerant Routing Algorithm in Meshes with Solid Faults

The Journal of Supercomputing
Optimal link scheduling on improving best-effort and guaranteed services performance in network-on-chip systems

Proceedings of the 43rd annual Design Automation Conference
An analytical model for hypercubes in the presence of multiple time-scale bursty traffic

Journal of Systems Architecture: the EUROMICRO Journal
Evaluation of SEU and crosstalk effects in network-on-chip switches

SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design
Throughput fairness in k-ary n-cube networks

ACSC '06 Proceedings of the 29th Australasian Computer Science Conference - Volume 48
Resource efficiency of the GigaNetIC chip multiprocessor architecture

Journal of Systems Architecture: the EUROMICRO Journal
Hardware supported multicast in fat-tree-based InfiniBand networks

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Low Diameter Interconnections for Routing in High-Performance Parallel Systems

IEEE Transactions on Computers
Computer engineering using innovative instructional technologies at the University of Southern California

WCAE '98 Proceedings of the 1998 workshop on Computer architecture education
Mathematical performance modelling of adaptive wormhole routing in optoelectronic hypercubes

Journal of Parallel and Distributed Computing
Multicasting based topology generation and core mapping for a power efficient networks-on-chip

ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Optimal gossiping in square 2D meshes

Theoretical Computer Science
One-to-all personalized communication in torus networks

PDCN'07 Proceedings of the 25th conference on Proceedings of the 25th IASTED International Multi-Conference: parallel and distributed computing and networks
A Latency-Aware Partitioning Method for Distributed Virtual Environment Systems

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Fault tolerant irregular augmented shuffle network

CEA'07 Proceedings of the 2007 annual Conference on International Conference on Computer Engineering and Applications
A new efficient routing algorithm for network-on-chip with best input and output selection techniques

DNCOCO'07 Proceedings of the 9th WSEAS International Conference on Data Networks, Communications, Computers
A deadlock-free routing algorithm using minimum number of virtual channels and application mappings for Hierarchical Torus Network

International Journal of High Performance Computing and Networking
Application-bypass reduction for large-scale clusters

International Journal of High Performance Computing and Networking
An accurate mathematical performance model of adaptive routing in the star graph

Future Generation Computer Systems
Combinatorial performance modelling of toroidal cubes

Journal of Systems Architecture: the EUROMICRO Journal
An empirical performance analysis of minimal and non-minimal routing in cube-based OTIS multicomputers

Journal of High Speed Networks
On reliable modular testing with vulnerable test access mechanisms

Proceedings of the 45th annual Design Automation Conference
Efficient algorithms and methods to solve dynamic MINs stability problem using stable matching with complete ties

Journal of Discrete Algorithms
Real-Time Communication Analysis for On-Chip Networks with Wormhole Switching

NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
The Effect of Network Topology and Channel Labels on the Performance of Label-Based Routing Algorithms

ICCS '08 Proceedings of the 8th international conference on Computational Science, Part I
Caspian: A Tunable Performance Model for Multi-core Systems

Euro-Par '08 Proceedings of the 14th international Euro-Par conference on Parallel Processing
A Communication-Aware Topological Mapping Technique for NoCs

Euro-Par '08 Proceedings of the 14th international Euro-Par conference on Parallel Processing
Unicast-based fault-tolerant multicasting in wormhole-routed hypercubes

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Communication Based Proactive Link Power Management

HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers
Modeling networking issues of network-on-chip: a coloured petri nets approach

Proceedings of the 2nd International Conference on Simulation Tools and Techniques
Routability of network topologies in FPGAs

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
System-on-Chip Test Architectures: Nanometer Design for Testability

System-on-Chip Test Architectures: Nanometer Design for Testability
Technical Communication: SimuRed: A flit-level event-driven simulator for multicomputer network performance evaluation

Computers and Electrical Engineering
Custom networks-on-chip architectures with multicast routing

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A general mathematical performance model for wormhole-switched irregular networks

Cluster Computing
A performance evaluation of 2D-mesh, ring, and crossbar interconnects for chip multi-processors

Proceedings of the 2nd International Workshop on Network on Chip Architectures
Structural reconfiguration: a way to conscience simulation

ASC '07 Proceedings of The Eleventh IASTED International Conference on Artificial Intelligence and Soft Computing
Quality-of-service and error control techniques for mesh-based network-on-chip architectures

Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
Performance evaluation of broadcast and global combine operations in all-port wormhole-routed OTIS-Mesh interconnection networks

Cluster Computing
Fault-tolerant routing and multicasting in hypercubes using a partial path set-up

Parallel Computing
A general methodology for direction-based irregular routing algorithms

Journal of Parallel and Distributed Computing
Localized algorithms and their applications in ad hoc wireless networks

ISPA'03 Proceedings of the 2003 international conference on Parallel and distributed processing and applications
A customized cross-bar for data-shuffling in domain-specific simd processors

ARCS'07 Proceedings of the 20th international conference on Architecture of computing systems
Performance analysis of interconnection networks under bursty and batch arrival traffic

ICA3PP'07 Proceedings of the 7th international conference on Algorithms and architectures for parallel processing
Mathematical performance modelling of stretched hypercubes

ICDCN'08 Proceedings of the 9th international conference on Distributed computing and networking
Ensuring the performance and scalability of peer-to-peer distributed virtual environments

Future Generation Computer Systems
EDXY - A low cost congestion-aware routing algorithm for network-on-chips

Journal of Systems Architecture: the EUROMICRO Journal
Analyzing nonblocking switching networks using linear programming (duality)

INFOCOM'10 Proceedings of the 29th conference on Information communications
Design and implementation of high-speed buffered crossbars with efficient load balancing for multi-core SoCs

Microprocessors & Microsystems
An efficent dynamic multicast routing protocol for distributing traffic in NOCs

Proceedings of the Conference on Design, Automation and Test in Europe
High level modeling and automated generation of heterogeneous SoC architectures with optimized custom reconfigurable cores and on-chip communication media

Journal of Systems Architecture: the EUROMICRO Journal
Routing to support communication in dependable networks

EUROMICRO-PDP'02 Proceedings of the 10th Euromicro conference on Parallel, distributed and network-based processing
Increasing the adaptivity of routing algorithms for k-ary n-cubes

EUROMICRO-PDP'02 Proceedings of the 10th Euromicro conference on Parallel, distributed and network-based processing
Benefits of high speed interconnects to cluster file systems: a case study with lustre

IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
A unified design space simulation environment for network-on-chip: fuse-N

International Journal of High Performance Systems Architecture
System design of full HD MVC decoding on mesh-based multicore NoCs

Microprocessors & Microsystems
Design of network-on-chip architectures with a genetic algorithm-based technique

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Improving the yield of NoC-based systems through fault diagnosis and adaptive routing

Journal of Parallel and Distributed Computing
Performance of CLOS multicast networks

ICCOM'06 Proceedings of the 10th WSEAS international conference on Communications
Reliability analysis of multi-path multi-stage interconnection network

ICCOMP'06 Proceedings of the 10th WSEAS international conference on Computers
Gradient descent optimization for routing in multistage interconnection networks

IWANN'11 Proceedings of the 11th international conference on Artificial neural networks conference on Advances in computational intelligence - Volume Part I
A routing algorithm of pairwise disjoint paths in a burnt pancake graph

Proceedings of the Second Symposium on Information and Communication Technology
Set-to-set disjoint-paths routing in recursive dual-net

ICA3PP'11 Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part I
On the use of multiplanes on a 2D mesh network-on-chip

ICA3PP'11 Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part II
Design and evaluation of low latency interconnection networks for real-time many-core embedded systems

Computers and Electrical Engineering
A hardware supported multicast scheme based on XY routing for 2-D mesh InfiniBand networks

The Journal of Supercomputing
Analytic modeling of channel traffic in n-cubes

CSR'06 Proceedings of the First international computer science conference on Theory and Applications
GigaNetIC – a scalable embedded on-chip multiprocessor architecture for network applications

ARCS'06 Proceedings of the 19th international conference on Architecture of Computing Systems
Ethernet as a lossless deadlock free system area network

ISPA'05 Proceedings of the Third international conference on Parallel and Distributed Processing and Applications
Analytic performance modeling of a fully adaptive routing algorithm in the torus

ISPA'05 Proceedings of the Third international conference on Parallel and Distributed Processing and Applications
Supporting MPI-2 one sided communication on multi-rail infiniband clusters: design challenges and performance benefits

HiPC'05 Proceedings of the 12th international conference on High Performance Computing
Design of an asynchronous switch based on butterfly fat-tree for network-on-chip applications

PCM'05 Proceedings of the 6th Pacific-Rim conference on Advances in Multimedia Information Processing - Volume Part II
Performance modeling of a fully adaptive and fault-tolerant wormhole switching strategy in 2-d mesh

ICCSA'06 Proceedings of the 2006 international conference on Computational Science and Its Applications - Volume Part V
Cost-Effective buffered wormhole routing

ISPA'04 Proceedings of the Second international conference on Parallel and Distributed Processing and Applications
Communication based proactive link power management

Transactions on High-Performance Embedded Architectures and Compilers IV
Proof Pearl: A Formal Proof of Dally and Seitz' Necessary and Sufficient Condition for Deadlock-Free Routing in Interconnection Networks

Journal of Automated Reasoning
A general technique to establish the asymptotic conditional diagnosability of interconnection networks

Theoretical Computer Science
HiCOO: Hierarchical cooperation for scalable communication in Global Address Space programming models on Cray XT systems

Journal of Parallel and Distributed Computing
Node-disjoint paths in a level block of generalized hierarchical completely connected networks

Theoretical Computer Science
LIGERO: A light but efficient router conceived for cache-coherent chip multiprocessors

ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
Cluster-based topologies for 3D Networks-on-Chip using advanced inter-layer bus architecture

Journal of Computer and System Sciences
NoCAlert: An On-Line and Real-Time Fault Detection Mechanism for Network-on-Chip Architectures

MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
A Read-Copy Update based parallel server for distributed crowd simulations

The Journal of Supercomputing
A scalable multiagent system architecture for interactive applications

Science of Computer Programming
Adaptive virtual channel partitioning for network-on-chip in heterogeneous architectures

ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special Section on Networks on Chip: Architecture, Tools, and Methodologies
TM: a new and simple topology for interconnection networks

The Journal of Supercomputing

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Abstract

From the Publisher:Addresses the challenges and details the basic underlying concepts of interconnection networks. The book's engineering approach considers the issues that designers need to deal with and presents a broad set of practical solutions. Considerable effort is made to establish new and more.