A new efficient routing algorithm for network-on-chip with best input and output selection techniques

Authors:
Ebrahim Behrouzian Nezjad;Ahmad Khadem Zadeh;Amin Javadi Nasab
Affiliations:
Dept. of Electrical and Computer Engineering, Azad University, Shushtar Branch, Iran;Dept. of Electrical and Computer Engineering, Azad University, Shushtar Branch, Iran;Dept. of Electrical and Computer Engineering, Azad University, Shushtar Branch, Iran
Venue:
DNCOCO'07 Proceedings of the 9th WSEAS International Conference on Data Networks, Communications, Computers
Year:
2007

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Abstract

The performance of Network-on-Chip (NoC) largely depends on the underlying routing techniques, which have two constituencies: output selection and input selection. Previous research on routing techniques for NoC has focused on the improvement of output selection. In this paper we will improve both output selection and input selection. In this paper, we present a novel routing algorithm(BIOS) which combines the advantages of both deterministic and adaptive routing algorithms. More precisely, we envision a new routing technique which judiciously switches between deterministic and adaptive routing based on the network's congestion conditions. When there are contentions of multiple input channels competing for the same output channel, our input selection technique decides which input channel obtains the access depending on the contention level of the upstream switches, which in turn removes possible network congestion. Simulation results with different traffic patterns show that our new routing algorithm(BIOS) achieves significant better performance than the other deterministic and adaptive routing algorithms.