The turn model for adaptive routing
Journal of the ACM (JACM)
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IEEE Transactions on Computers
Self-similarity and heavy tails: structural modeling of network traffic
A practical guide to heavy tails
The Odd-Even Turn Model for Adaptive Routing
IEEE Transactions on Parallel and Distributed Systems
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PACT '00 Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Proceedings of the 41st annual Design Automation Conference
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
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DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
DyAD: smart routing for networks-on-chip
Proceedings of the 41st annual Design Automation Conference
Proceedings of the 42nd annual Design Automation Conference
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Proceedings of the 42nd annual Design Automation Conference
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SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
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IEEE Design & Test
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ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
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Proceedings of the conference on Design, automation and test in Europe: Proceedings
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Proceedings of the 33rd annual international symposium on Computer Architecture
HIBI Communication Network for System-on-Chip
Journal of VLSI Signal Processing Systems
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Proceedings of the 41st annual Design Automation Conference
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Proceedings of the 41st annual Design Automation Conference
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SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design
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SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design
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SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design
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CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
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CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
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Proceedings of the 34th annual international symposium on Computer architecture
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NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
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NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
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NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
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NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
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NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
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NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
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Proceedings of the conference on Design, automation and test in Europe
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Proceedings of the 44th annual Design Automation Conference
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Proceedings of the 20th annual conference on Integrated circuits and systems design
DNCOCO'07 Proceedings of the 9th WSEAS International Conference on Data Networks, Communications, Computers
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EHAC'06 Proceedings of the 5th WSEAS International Conference on Electronics, Hardware, Wireless and Optical Communications
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
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Proceedings of the conference on Design, automation and test in Europe
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ICCS '08 Proceedings of the 8th international conference on Computational Science, Part I
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Proceedings of the 36th annual international symposium on Computer architecture
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NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
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NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
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NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
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Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
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ICA3PP '09 Proceedings of the 9th International Conference on Algorithms and Architectures for Parallel Processing
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CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
A DP-network for optimal dynamic routing in network-on-chip
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
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Proceedings of the 2nd International Workshop on Network on Chip Architectures
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Computers and Electrical Engineering
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ICCSA'07 Proceedings of the 2007 international conference on Computational science and its applications - Volume Part III
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International Journal of High Performance Systems Architecture
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Journal of Systems Architecture: the EUROMICRO Journal
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
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ICACT'10 Proceedings of the 12th international conference on Advanced communication technology
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Journal of Systems Architecture: the EUROMICRO Journal
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SBCCI '10 Proceedings of the 23rd symposium on Integrated circuits and system design
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Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
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Proceedings of the Conference on Design, Automation and Test in Europe
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CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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NPC'10 Proceedings of the 2010 IFIP international conference on Network and parallel computing
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Proceedings of the Third International Workshop on Network on Chip Architectures
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IEEE Transactions on Circuits and Systems Part I: Regular Papers
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International Journal of High Performance Systems Architecture
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International Journal of High Performance Systems Architecture
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Proceedings of the Fifth International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip
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Microprocessors & Microsystems
Proceedings of the 16th Asia and South Pacific Design Automation Conference
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Journal of Parallel and Distributed Computing
DBAR: an efficient routing algorithm to support multiple concurrent applications in networks-on-chip
Proceedings of the 38th annual international symposium on Computer architecture
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Advances in Engineering Software
BOFAR: buffer occupancy factor based adaptive router for mesh NoCs
Proceedings of the 4th International Workshop on Network on Chip Architectures
A reliable and power efficient flow-control method to eliminate crosstalk faults in network-on-chips
Microprocessors & Microsystems
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ICA3PP'10 Proceedings of the 10th international conference on Algorithms and Architectures for Parallel Processing - Volume Part I
DTBR: A dynamic thermal-balance routing algorithm for Network-on-Chip
Computers and Electrical Engineering
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Transactions on High-Performance Embedded Architectures and Compilers IV
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ICDCN'12 Proceedings of the 13th international conference on Distributed Computing and Networking
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Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
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Microprocessors & Microsystems
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Microprocessors & Microsystems
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Journal of Parallel and Distributed Computing
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Microelectronics Journal
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DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special Section on Networks on Chip: Architecture, Tools, and Methodologies
Fuzzy-based Adaptive Routing Algorithm for Networks-on-Chip
Journal of Systems Architecture: the EUROMICRO Journal
Journal of Systems Architecture: the EUROMICRO Journal
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ACM Computing Surveys (CSUR)
Design space exploration of on-chip ring interconnection for a CPU-GPU heterogeneous architecture
Journal of Parallel and Distributed Computing
Journal of Systems Architecture: the EUROMICRO Journal
Non-minimal, turn-model based NoC routing
Microprocessors & Microsystems
Providing multiple hard latency and throughput guarantees for packet switching networks on chip
Computers and Electrical Engineering
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In this paper, we present and evaluate a novel routing scheme called DyAD which combines the advantages of both deterministic and adaptive routing schemes. More precisely, we envision a new routing technique which judiciously switches between deterministic and adaptive routing based on the network's congestion conditions. The simulation results show the effectiveness of DyAD by comparing it with purely deterministic and adaptive routing schemes under different traffic patterns. Moreover, a prototype router based on the DyAD idea has been designed and evaluated. Compared to purely adaptive routers, the overhead of implementing DyAD is negligible (less than 7%), while the performance is consistently better.