Evaluating Design Choices for Shared Bus Multiprocessors in a Throughput-Oriented Environment
IEEE Transactions on Computers
Interconnection networks for high-performance parallel computers
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DATE '00 Proceedings of the conference on Design, automation and test in Europe
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Proceedings of the 41st annual Design Automation Conference
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
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DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Journal of VLSI Signal Processing Systems
Benchmarking mesh and hierarchical bus networks in system-on-chip context
Journal of Systems Architecture: the EUROMICRO Journal
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EURASIP Journal on Embedded Systems
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SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
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MARTE profile extension for modeling dynamic power management of embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
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ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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This paper presents a communication network targeted for complex system-on-chip (SoC) and network-on-chip (NoC) designs. The Heterogeneous IP Block Interconnection (HIBI) aims at maximum efficiency and minimum energy per transmitted bit combined with quality-of-service (QoS) in transfers. Other features include support for hierarchical topologies with several clock domains, flexible scalability, and runtime reconfiguration of network parameters. HIBI is intended for integrating coarse-grain components such as intellectual property (IP) blocks that have size of thousands of gates.HIBI has been implemented in VHDL and SystemC and synthesized on several CMOS technologies and on FPGA. A 32-bit wrapper requires 5400 gates and runs with 315 MHz on 0.18 驴 m technology which shows that only minimal area overhead is paid for the advanced features. The area and frequency results are well comparable to other NoC proposals.Furthermore, data transfers are shown to approach the maximum theoretical performance for protocol efficiency. HIBI network is accompanied with a design framework with tools for optimizing the system through automated design space exploration.