On the self-similar nature of Ethernet traffic (extended version)
IEEE/ACM Transactions on Networking (TON)
ATM: the new paradigm for Internet, intranet, and residential broadband services and applications
ATM: the new paradigm for Internet, intranet, and residential broadband services and applications
Quality of Service in ATM Networks: State-of-the-Art Traffic Management
Quality of Service in ATM Networks: State-of-the-Art Traffic Management
QNoC: QoS architecture and design process for network on chip
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Networks on chip
On-chip traffic modeling and synthesis for MPEG-2 video applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DyAD: smart routing for networks-on-chip
Proceedings of the 41st annual Design Automation Conference
A Complete Network-On-Chip Emulation Framework
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
HERMES: an infrastructure for low area overhead packet-switching networks on chip
Integration, the VLSI Journal - Special issue: Networks on chip and reconfigurable fabrics
Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures
IEEE Transactions on Computers
Traffic generation and performance evaluation for mesh-based NoCs
SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
MAIA: a framework for networks on chip generation and verification
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Buffer sizing for QoS flows in wormhole packet switching NoCs
Proceedings of the 20th annual conference on Integrated circuits and systems design
Modeling and Implementation of an Output-Queuing Router for Networks-on-Chips
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
A flexible framework for communication evaluation in SoC design
International Journal of Parallel Programming
A path-load based adaptive routing algorithm for networks-on-chip
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
A monitoring and adaptive routing mechanism for QoS traffic on mesh NoC architectures
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Implementation and evaluation of a congestion aware routing algorithm for networks-on-chip
SBCCI '10 Proceedings of the 23rd symposium on Integrated circuits and system design
Comprehensive on-chip traffic generator model for SoC design and synthesis
SpringSim '10 Proceedings of the 2010 Spring Simulation Multiconference
A generic FPGA prototype for on-chip systems with network-on-chip communication infrastructure
Computers and Electrical Engineering
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The network on chip (NoC) design process requires an adequate characterization of the application running on it to optimize communication resources utilization and dimensioning. The traffic modeling process is the most essential step for characterizing complex applications. It is possible to identify three methods to model traffic in NoC literature. The first one assumes sources continually send data at a constant rate to the network and it is the most commonly used. The second method employs probabilistic functions to model the traffic behavior for typical applications, as audio and video streams. The accuracy of this method is better, at the extra cost of modeling complexity and simulation time. The third method employs traffic traces to evaluate network performance. Even with small traces, simulation time can be prohibitive. The advantage is accuracy, superior to the previous models. Even if a given application is correctly modeled, other flows interfere on how the application traffic behaves within the network. Results about the mutual interference of different traffic flows in NoCs are scarce. This work has two main objectives: (i) compare NoC performance, in terms of throughput and latency, when different traffic models are used for the same application; (ii) evaluate the impact of network noise traffic on some specific modeled flow. Preliminary results show how far is the real NoC performance for a given application when an oversimplified model is employed. The conclusion is that NoCs must employ internal mechanisms to ensure QoS, since noise traffic makes modeled traffic to depart from its predicted behavior.