Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Computers
A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
The turn model for adaptive routing
Journal of the ACM (JACM)
ROMM routing on mesh and torus networks
Proceedings of the seventh annual ACM symposium on Parallel algorithms and architectures
Deadlock-free oblivious wormhole routing with cyclic dependencies
Proceedings of the ninth annual ACM symposium on Parallel algorithms and architectures
iWarp: anatomy of a parallel computing system
iWarp: anatomy of a parallel computing system
The Odd-Even Turn Model for Adaptive Routing
IEEE Transactions on Parallel and Distributed Systems
Introduction to Algorithms
IEEE Transactions on Parallel and Distributed Systems
A Necessary and Sufficient Condition for Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Application-Specific Deadlock Free Wormhole Routing on Multicomputers
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Throughput-centric routing algorithm design
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Fast Dynamic Reconfiguration in Irregular Networks
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A Delay Model and Speculative Architecture for Pipelined Routers
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SUNMAP: a tool for automatic topology selection and generation for NoCs
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Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Near-Optimal Worst-Case Throughput Routing for Two-Dimensional Mesh Networks
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ACM Computing Surveys (CSUR)
A methodology for design of application specific deadlock-free routing algorithms for NoC systems
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ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers
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ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
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NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
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ICCSA'06 Proceedings of the 2006 international conference on Computational Science and Its Applications - Volume Part II
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A framework for designing congestion-aware deterministic routing
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NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
An abacus turn model for time/space-efficient reconfigurable routing
Proceedings of the 38th annual international symposium on Computer architecture
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Proceedings of the International Conference on Computer-Aided Design
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Moths: Mobile threads for on-chip networks
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Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
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ACM Transactions on Architecture and Code Optimization (TACO)
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Conventional oblivious routing algorithms are either not application-aware or assume that each flow has its own private channel to ensure deadlock avoidance. We present a framework for application-aware routing that assures deadlock-freedom under one or more channels by forcing routes to conform to an acyclic channel dependence graph. Arbitrary minimal routes can be made deadlock-free through appropriate static channel allocation when two or more channels are available. Given bandwidth estimates for flows, we present a mixed integer-linear programming (MILP) approach and a heuristic approach for producing deadlock-free routes that minimize maximum channel load. The heuristic algorithm is calibrated using the MILP algorithm and evaluated on a number of benchmarks through detailed network simulation. Our framework can be used to produce application-aware routes that target the minimization of latency, number of flows through a link, bandwidth, or any combination thereof.