Analog VLSI Synaptic Matrices as Building Blocks for Neural Networks

Authors:
Olivier Rossetto;Christian Jutten;Jeanny Herault;Ingo Kreuzer
Affiliations:
-;-;-;-
Venue:
IEEE Micro
Year:
1989

Citing 4
Cited 5

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Binary synaptic connections based on memory switching in a-Si:H

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Self-organization and associative memory: 3rd edition

Self-organization and associative memory: 3rd edition

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Simulating a Function of Visual Peripheral Processes with an Analog VLSI Network

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Differential Hot Electron Injection in an Adaptive Floating Gate Comparator

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Differential Hot Electron Injection in an Adaptive Floating Gate Comparator

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Effects of nonlinear synapses on the performance of multilayer neural networks

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Abstract

An associative memory circuit that may let designers expand neural networks around a matrix of analog synapses is described. The architecture of the chip and its basic cell are discussed, and some SPICE simulation results are presented and compared with measures provided by the first prototype. In particular, the linearity and dynamic response of the complete chip, which includes an array of 25 synapses and two address decoders used for programming the weights, are examined.