VLSI Implementation of Fuzzy Adaptive Resonance and Learning Vector Quantization
Analog Integrated Circuits and Signal Processing
CMOS Circuit Design, Layout, and Simulation, Second Edition
CMOS Circuit Design, Layout, and Simulation, Second Edition
Analog soft-pattern-matching classifier using floating-gate MOS technology
IEEE Transactions on Neural Networks
A 750-MHz 6-b adaptive floating-gate quantizer in 0.35-µm CMOS
IEEE Transactions on Circuits and Systems Part I: Regular Papers
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We introduce differential-mode hot electron injection for adapting and storing analog nonvolatile signed state variables. This approach is compatible with modern digital CMOS technologies and is readily extended to novel circuit applications. We highlight advantages of the technique by applying it to the design of an adaptive floating gate comparator (AFGC). This is the first use of this technique for adaptation in a nonlinear circuit. The AFGC computes appropriate voltages for locally adapting the input floating gate nodes to cancel offsets. The technique is amenable to both local and nonlocal adaptation which allows greater design flexibility.The AFGC has been fabricated in a commercially available 0.35 驴m CMOS process. We experimentally demonstrate more than two orders of magnitude reduction in offset voltage: the mean offset is reduced by 416X relative to chips direct from the foundry and by 202X relative to UV-irradiated chips. We consider both static and dynamic adaptation and demonstrate that the the accuracy of dynamic offset cancellation is approximately two orders of magnitude better than static adaptation. In the presence of observed 8% injection mismatch, the AFGC robustly converges to within 728 驴V of the desired input offset (mean offset 驴109 驴V, standard deviation 379 驴V). Adaptation occurs within milliseconds, with charge retention for more than one month, and variation of offset error with temperature of 驴15 驴V/^驴C.