ACM Computing Surveys (CSUR) - The MIT Press scientific computation series
On the Achievement of a Highly Dependable and Fault-Tolerant Air Traffic Control System
Computer - The FAA's Advanced Automation Program
The Gmicro/300 32-Bit Microprocessor
IEEE Micro
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Sure System 2000, a fault-tolerant computer that couples multiprocessors to offer low-priced, high-performance systems that deal effectively with faults and failures, is presented. The architecture is based on the local redundancy technique, ensuring that no hardware or software fault can cause a system crash. Software errors can be fixed, and hardware can be replaced, upgraded, or added dynamically. Existing fault-tolerant computers are briefly reviewed, and the logic hardware system configuration of the Sure System 2000 is described. The multiprocessor and I/O architecture are examined. The SXO Sure System 2000 expandable operating system is described.