Accurate Low-Cost Methods for Performance Evaluation of Cache Memory Systems
IEEE Transactions on Computers
The PowerPC performance modeling methodology
Communications of the ACM
A spectral method for confidence interval generation and run length control in simulations
Communications of the ACM - Special issue on simulation modeling and statistical computing
A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches
IEEE Transactions on Computers
Profile-Driven Generation of Trace Samples
ICCD '96 Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors
Representative Traces for Processor Models with Infinite Cache
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
Analysis of cache replacement-algorithms
Analysis of cache replacement-algorithms
Efficient simulation of trace samples on parallel machines
Parallel Computing
The RASE (Rapid, Accurate Simulation Environment) for chip multiprocessors
ACM SIGARCH Computer Architecture News - Special issue: dasCMP'05
Simulation of Computer Architectures: Simulators, Benchmarks, Methodologies, and Recommendations
IEEE Transactions on Computers
Yet shorter warmup by combining no-state-loss and MRRL for sampled LRU cache simulation
Journal of Systems and Software - Special issue: Quality software
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The increasing complexity of realistic benchmarks combined with the relatively sluggish rate of detailed performance analysis has resulted in an ever-increasing gap between the size of the workload and the speed of analysis. We have presented a methodology for generating and validating representative input sampled data (traces) from SPEC95 benchmark suite using R-metric and K-metric. Experimental results demonstrate the superiority of our proposed technique over the existing popular profile-driven methodology and the uniform sampling approach.