On the effective bandwidth of interleaved memories in vector processor systems
IEEE Transactions on Computers
A Simulation Study of the CRAY X-MP Memory System
IEEE Transactions on Computers
A close look at vector performance of register-to-register vector computers and a new model
SIGMETRICS '87 Proceedings of the 1987 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Some results in memory conflict analysis
Proceedings of the 1989 ACM/IEEE conference on Supercomputing
| Hi-index | 14.98 |
In a multiport memory access vector processor such as the CRAY X-MP, the numbering of section (lines) relative to bank numbering affects the delay characteristics of vector memory accesses. The author examines numberings which affect the vector startup delay. It has been shown previously that section numberings now associated with the X-MP-4 reduced the steady-state section delays of randomly conflicting vector accesses, vis-a-vis the X-MP-2 numberings. For the present study, it is shown that these same numberings increase the startup delays of such accesses, thus establishing a tradeoff between numbering protocols.