High-performance computer architecture
High-performance computer architecture
IEEE Transactions on Computers
Trends in systolic and cellular computation
ISCM '90 Proceedings of the International Symposium on Computation mathematics
An Adaptation of the Fast Fourier Transform for Parallel Processing
Journal of the ACM (JACM)
The cube-connected cycles: a versatile network for parallel computation
Communications of the ACM
On computing the fast Fourier transform
Communications of the ACM
New layouts for the shuffle-exchange graph(Extended Abstract)
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
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Matrix algebra is used to design and validate parallel algorithms for large constant-geometry fast Fourier transforms (FFTs) on fixed-size array processors. The N-point radix 2 case for a linear array processor with N/2 cells is identical to the usual procedure corresponding to the matrix factorization of M.C. Pease, (1968). The algorithms are engendered by matrix factorizations, which themselves depend on a basic factorization of the perfect shuffle. The resulting data movement is realized in parallel as relatively small perfect shuffles inside each local memory and along each row and column of the array processor, without requiring that the complete array itself have the shuffle-exchange network.