Reconfiguration Procedures for a Polymorphic and Partitionable Multiprocessor
IEEE Transactions on Computers
A Conflict-Free Routing Scheme on Multistage Interconnection Networks
IEEE Transactions on Computers
On the Constant Diagnosability of Baseline Interconnection Networks
IEEE Transactions on Computers
Detection and Location of Multiple Faults in Baseline Interconnection Networks
IEEE Transactions on Computers
On Self-Diagnosable Multiprocessor Systems: Diagnosis by the Comparison Approach
IEEE Transactions on Computers
Diagnosis and Repair in Multiprocessor Systems
IEEE Transactions on Computers
| Hi-index | 14.98 |
This paper is concerned with a distributed, system-level fault diagnosis scheme for multistage network-based multiprocessors. The target system, which we choose as a representative, employs a multistage interconnection network (MIN) with 4 脳 4 switching elements. We propose a fast diagnostic method which uses a quadtree [1] and its coupler structure. These two quadtree structures partition the system into a number of Link-Independent Groups (LIGs). This partitioning provides an important diagnostic property; the communication paths in each LIG are either identical or disjoint. Several previous works in fault diagnosis investigated the multistage interconnection network only. This paper presents an entire multiprocessor diagnosis, including the detection and location of single faults caused by processor nodes, switching elements, and communication links. In addition, the diagnosis of a group of multiple faults partitioned by the tree structures is also discussed.