Efficient selection on a binary tree
Information Processing Letters
Array processor with multiple broadcasting
Journal of Parallel and Distributed Computing
Pyramidal systems for computer vision
Pyramidal systems for computer vision
Image Computations on Meshes with Multiple Broadcast
IEEE Transactions on Pattern Analysis and Machine Intelligence
Space multiplexing of waveguides in optically interconnected multiprocessor systems
The Computer Journal - Special issue on object-oriented programming
Pipelined communications in optically interconnected arrays
Journal of Parallel and Distributed Computing
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Introduction to parallel algorithms and architectures: array, trees, hypercubes
Introduction to parallel algorithms and architectures: array, trees, hypercubes
Sorting on a mesh-connected parallel computer
Communications of the ACM
Designing Efficient Parallel Algorithms on Mech-Connected Computers with Multiple Broadcasting
IEEE Transactions on Parallel and Distributed Systems
Reconfiguration with Time Division Multiplexed MIN's for Multiprocessor Communications
IEEE Transactions on Parallel and Distributed Systems
X-Tree: A tree structured multi-processor computer architecture
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Mapping pyramids into 3-D meshes
Nordic Journal of Computing
Lower Bounds on the Loading of Multiple Bus Networks for Binary Tree Algorithms
IEEE Transactions on Computers
Proof that pyramid networks are 1-Hamiltonian-connected with high probability
Information Sciences: an International Journal
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We study the problem of network embeddings in 2-D array architectures in which eachrow and column of processors are interconnected by a bus. These architectures areespecially attractive if optical buses are used that allow simultaneous access by multipleprocessors through either wavelength division multiplexing or message pipelining, thusovercoming the bottlenecks caused by the exclusive access of buses. In particular, wedefine S-trees to include both binary X-trees and pyramids, and present two embeddingsof X-trees into 2-D processor arrays with spanning buses. The first embedding has theproperty that all neighboring nodes in X-trees are mapped to the same bus in the targetarray, thus allowing any two neighbors in the embedded S-trees to communicate witheach other in one routing step. The disadvantage of this embedding is its relatively highexpansion cost. In contrast, the second embedding has an expansion cost approachingunity, but does not map all neighboring nodes in X-trees to the same bus. Theseembeddings allow all algorithms designed for binary trees, pyramids, as well as X-trees to be executed on the target arrays.