Worst case bound of an LRF schedule for the mean weighted flow-time problem
SIAM Journal on Computing
Two processor scheduling is in NC
SIAM Journal on Computing
Speedup Versus Efficiency in Parallel Systems
IEEE Transactions on Computers
Task assignment in a multiprocessor system
Microprocessing and Microprogramming
Another view on parallel speedup
Proceedings of the 1990 ACM/IEEE conference on Supercomputing
Measuring parallelism in algorithms
Euromicro 91 Proceedings of the seventeenth Euromicro conference on Software and hardware : specification and design: specification and design
Parallelism measures of task graphs for multiprocessors
Microprocessing and Microprogramming
An Almost-Linear Algorithm for Two-Processor Scheduling
Journal of the ACM (JACM)
Analyzing the expected execution times of parallel programs
SAC '97 Proceedings of the 1997 ACM symposium on Applied computing
Static scheduling algorithms for allocating directed task graphs to multiprocessors
ACM Computing Surveys (CSUR)
Stochastic Bounds for Parallel Program Execution Times with Processor Constraints
IEEE Transactions on Computers
Symbolic Performance Modeling of Parallel Systems
IEEE Transactions on Parallel and Distributed Systems
A fast task-to-processor assignment heuristic for real-time multiprocessor DSP applications
Computers and Operations Research
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The lower and upper bounds on the minimum time needed to process a given directedacyclic task graph for a given number of processors are derived. It is proved that theproposed lower bound on time is not only sharper than the previously known values butalso easier to calculate. The upper bound on time, which is useful in determining theworst case behavior of a given task graph, is presented. The lower and upper bounds onthe minimum number of processors required to process a given task graph in the minimum possible time are also derived. It is seen with a number of randomly generated dense task graphs that the lower and upper bounds we derive are equal, thus giving the optimal time for scheduling directed acyclic task graphs on a given set of processors.