On the evaluation of expressions using accumulators, stacks and store-to-store instructions

Authors:
J. L. Keedy
Affiliations:
Monash University, Clayton, Victoria, Australia.
Venue:
ACM SIGARCH Computer Architecture News
Year:
1978

Citing 3
Cited 9

Implications of structured programming for machine architecture

Communications of the ACM
On the use of stacks in the evaluation of expressions

ACM SIGARCH Computer Architecture News
The case against stack-oriented instruction sets

ACM SIGARCH Computer Architecture News

Real-time performance of the HARRIS RTX 2000 stack architecture versus the Sun 4 SPARC and the Sun 3 M68020 architectures with a proposed real-time performance benchmark

ACM SIGMETRICS Performance Evaluation Review
Performance of the HARRIS RTX 2000 Stack Architecture versus the Sun 4 SPARC and the Sun 3 M68020 Architectures

ACM SIGARCH Computer Architecture News
Linear logic and permutation stacks—the Forth shall be first

ACM SIGARCH Computer Architecture News - Special issue: panel sessions of the 1991 workshop on multithreaded computers
Instruction Sets for Evaluating Arithmetic Expressions

Journal of the ACM (JACM)
More on the use of stacks in the evaluation of expressions

ACM SIGARCH Computer Architecture News
The BLIZZARD computer architecture

ACM SIGARCH Computer Architecture News
A stack addressing scheme based on windowing

ACM SIGARCH Computer Architecture News
Transient variable caching in Java’s stack-based intermediate representation

Scientific Programming
An Instruction Set for Evaluating Expressions

IEEE Transactions on Computers

Quantified Score

Hi-index	0.00

Visualization

Abstract