Reduced instruction set computer architectures for VLSI
Reduced instruction set computer architectures for VLSI
Minimization by the D Algorithm
IEEE Transactions on Computers
Measurement and evaluation of the MIPS architecture and processor
ACM Transactions on Computer Systems (TOCS)
Register windows vs. register allocation
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
Using Peephole Optimization on Intermediate Code
ACM Transactions on Programming Languages and Systems (TOPLAS)
On the use of stacks in the evaluation of expressions
ACM SIGARCH Computer Architecture News
On the evaluation of expressions using accumulators, stacks and store-to-store instructions
ACM SIGARCH Computer Architecture News
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
The case against stack-oriented instruction sets
ACM SIGARCH Computer Architecture News
More on the use of stacks in the evaluation of expressions
ACM SIGARCH Computer Architecture News
IEEE Transactions on Computers
The evaluation of expressions in a storage-to-storage architecture
ACM SIGARCH Computer Architecture News
| Hi-index | 0.00 |