Implicit Test Sequences Compaction for Decreasing Test Application Cos

  • Authors:
  • Roberto Bevacqua;Luca Guerrazzi;Fabrizio Ferrandi;Franco Fummi

  • Affiliations:
  • -;-;-;-

  • Venue:
  • ICCD '96 Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors
  • Year:
  • 1996

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Abstract

Test pattern storage is an important problem affecting all Design for Testability (DfT) techniques based on scan-path. Test compaction is the key idea to reduce this problem, but in case of partial-scan test compaction would concern the concatenation and overlapping of test sequences instead of test vectors. Unfortunately, standard sequential TPGs do not show sufficient capabilities in test sequences compaction. Thus, the paper presents an innovative compaction strategy for test sequences based on implicit techniques. Preliminary results show that the use of the presented technique can sensibly reduce the amount of test patterns which must be stored and applied.