Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Handbook of theoretical computer science (vol. B)
Temporal verification of reactive systems: safety
Temporal verification of reactive systems: safety
Model checking software systems: a case study
SIGSOFT '95 Proceedings of the 3rd ACM SIGSOFT symposium on Foundations of software engineering
Patterns in property specifications for finite-state verification
Proceedings of the 21st international conference on Software engineering
Symbolic Model Checking
"Sometimes" and "not never" revisited: on branching versus linear time (preliminary report)
POPL '83 Proceedings of the 10th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
An Experiment in Program Composition and Proof
Formal Methods in System Design
Automated testing in software engineering: using ant colony and self-regulated swarms
MS'06 Proceedings of the 17th IASTED international conference on Modelling and simulation
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A natural trend in most of the engineering disciplines is the construction of systems from components. This has the potential to reduce costs and increase reliability, provided that the components can be specified and verified in such a way that it is possible to reason about the composed system. In this paper, we explore an approach to compositional reasoning that uses model checking to verify component specifications and deduction to verify the constraints that a component imposes on the system in which it is embedded. We use CTL as the specification language along with the SMV model checker.